Displaying 4 results from an estimated 4 matches for "scheduledfs".
2013 Jul 01
0
[LLVMdev] MI Scheduler vs SD Scheduler?
...you enable MI sched for x86.
The generic heuristics are implemented as a priority function that makes a greedy choice over the ready instructions based on the current pressure and the resources and latency of the scheduled and unscheduled set of instructions.
An DAG subtree analysis also exists (ScheduleDFS), which can be used for register pressure avoidance. This isn't hooked up to the generic heuristics yet for lack of interesting test cases.
> So, I would appreciate any pointer to a document (or a blog) that may help us understand the difference and the relation between the two schedulers a...
2013 Jun 28
2
[LLVMdev] MI Scheduler vs SD Scheduler?
Hi,
We are currently in the process of upgrading from LLVM 2.9 to LLVM 3.3. We are working on instruction scheduling
(mainly for register pressure reduction). I have been following the llvmdev mailing list and have learned that a machine instruction (MI)
scheduler has been implemented to replace (or work with?) the selection DAG (SD)
scheduler. However, I could not find any document that
2013 Jul 02
2
[LLVMdev] MI Scheduler vs SD Scheduler?
...you enable MI sched for x86.
The generic heuristics are implemented as a priority function that makes a greedy choice over the ready instructions based on the current pressure and the resources and latency of the scheduled and unscheduled set of instructions.
An DAG subtree analysis also exists (ScheduleDFS), which can be used for register pressure avoidance. This isn't hooked up to the generic heuristics yet for lack of interesting test cases.
So, I would appreciate any pointer to a document (or a blog) that may help us understand the difference and the relation between the two schedulers and fi...
2013 Jul 12
0
[LLVMdev] MI Scheduler vs SD Scheduler?
...MI sched for x86.
> The generic heuristics are implemented as a priority function that makes a greedy choice over the ready instructions based on the current pressure and the resources and latency of the scheduled and unscheduled set of instructions.
> An DAG subtree analysis also exists (ScheduleDFS), which can be used for register pressure avoidance. This isn't hooked up to the generic heuristics yet for lack of interesting test cases.
>
>> So, I would appreciate any pointer to a document (or a blog) that may help us understand the difference and the relation between the two sch...