search for: sched

v4: Updated the wait dependancy bars based on tex component masks. This patch adds proper delays to maxwell exa shaders. Tested with rendercheck -f a8r8g8b8. I am still wondering whether the rd's are required. We could still wait on the write bars instead. eg. see "sched (st 0xf wr 0x1 wt 0x2) (st 0xf wr 0x1 wt 0x2) (st 0xf)" in exacmnv110.fp Trello: https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-with-proper-delays Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> --- src/shader/exac8nv110.fp | 10 +++++----- src/shader/exac8n...

...+++++++++++++------------- 14 files changed, 93 insertions(+), 93 deletions(-) diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index ce78036..101b67f 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { }; #else -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) ipa pass $r0 a[0x7c] 0x0 0x0 0x1 mufu rcp $r0 $r0 ipa $r3 a[0x94] $r0 0x0 0x1 -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr 0x1 wt 0x2) ipa $r2 a[0...

...+++++++++++++------------- 14 files changed, 93 insertions(+), 93 deletions(-) diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index ce78036..1c4a4f1 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { }; #else -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) ipa pass $r0 a[0x7c] 0x0 0x0 0x1 mufu rcp $r0 $r0 ipa $r3 a[0x94] $r0 0x0 0x1 -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr 0x1 wt 0x2) ipa $r2 a[0...

nouveau_abi16_ioctl_channel_alloc() and nouveau_cli_init() simply call their corresponding *_fini() counterpart. This can lead to nouveau_sched_fini() being called without struct nouveau_sched ever being initialized in the first place. Instead of embedding struct nouveau_sched into struct nouveau_cli and struct nouveau_chan_abi16, allocate struct nouveau_sched separately, such that we can check for the corresponding pointer to be NULL in...

...tex component masks. > > > > This patch adds proper delays to maxwell exa shaders. Tested with > > rendercheck -f a8r8g8b8. > > > > I am still wondering whether the rd's are required. We could > > still wait on the write bars instead. eg. see > > "sched (st 0xf wr 0x1 wt 0x2) (st 0xf wr 0x1 wt 0x2) (st 0xf)" in > exacmnv110.fp > > > > Trello: > > https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-wit > h-proper-delays > > > > Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> > &...

Generated with envysched. Tested by running rendercheck from piglit, running mplayer -vo xv, and staring at gnome-shell. Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com> --- src/shader/exac8nv110.fp | 11 ++++---- src/shader/exac8nv110.fpc | 22 ++++++++-------- src/shader/exacanv110.fp | 11 ++++---- src/...

.../videonv110.fpc | 18 ++++++------------ 14 files changed, 36 insertions(+), 69 deletions(-) diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index ce78036..220d7e5 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -36,12 +36,11 @@ ipa $r3 a[0x84] $r0 0x0 0x1 sched (st 0x0) (st 0x0) (st 0x0) ipa $r2 a[0x80] $r0 0x0 0x1 tex nodep $r0 $r2 0x0 0x0 t2d 0x8 -depbar le 0x5 0x0 0x0 -sched (st 0x0) (st 0x0) (st 0x0) fmul ftz $r3 $r0 $r1 +sched (st 0x0) (st 0x0) (st 0x0) mov $r2 $r3 0xf mov $r1 $r3 0xf -sched (st 0x0) (st 0x0) (st 0x0) mov $r0 $r3 0xf +sched (st...

On Tue, Jun 6, 2017 at 7:15 AM, Samuel Pitoiset <samuel.pitoiset at gmail.com> wrote: > Nice work! > > See my comments below, and double-check if some of them can be applied to > the shaders I didn't review yet. > > I recommend you to test your work because if one sched code is wrong, you > are likely going to kill your card and reboot your box. :-) > > > On 06/03/2017 04:16 PM, Aaryaman Vasishta wrote: > >> v2: Add missing delays >> >> This patch adds proper delays to maxwell exa shaders. rendercheck tests >> seem consistent...

...+++++++++++++------------- 14 files changed, 93 insertions(+), 93 deletions(-) diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index ce78036..1c4a4f1 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { }; #else -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) ipa pass $r0 a[0x7c] 0x0 0x0 0x1 mufu rcp $r0 $r0 ipa $r3 a[0x94] $r0 0x0 0x1 -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr 0x1 wt 0x2) ipa $r2 a[0...

...the wait dependancy bars based on tex component masks. > > This patch adds proper delays to maxwell exa shaders. Tested with > rendercheck -f a8r8g8b8. > > I am still wondering whether the rd's are required. We could > still wait on the write bars instead. eg. see > "sched (st 0xf wr 0x1 wt 0x2) (st 0xf wr 0x1 wt 0x2) (st 0xf)" in exacmnv110.fp > > Trello: > https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-with-proper-delays > > Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> > --- > src/shader/exac8nv110.fp...

...d the wait dependancy bars based on tex component masks. > > This patch adds proper delays to maxwell exa shaders. Tested with > rendercheck -f a8r8g8b8. > > I am still wondering whether the rd's are required. We could > still wait on the write bars instead. eg. see > "sched (st 0xf wr 0x1 wt 0x2) (st 0xf wr 0x1 wt 0x2) (st 0xf)" in exacmnv110.fp > > Trello: > https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-with-proper-delays > > Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> > --- > src/shader/exac8nv110.fp |...

...93 insertions(+), 93 deletions(-) > > diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp > index ce78036..101b67f 100644 > --- a/src/shader/exac8nv110.fp > +++ b/src/shader/exac8nv110.fp > @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { > }; > #else > > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) > ipa pass $r0 a[0x7c] 0x0 0x0 0x1 > mufu rcp $r0 $r0 > ipa $r3 a[0x94] $r0 0x0 0x1 > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0...

Nice work! See my comments below, and double-check if some of them can be applied to the shaders I didn't review yet. I recommend you to test your work because if one sched code is wrong, you are likely going to kill your card and reboot your box. :-) On 06/03/2017 04:16 PM, Aaryaman Vasishta wrote: > v2: Add missing delays > > This patch adds proper delays to maxwell exa shaders. rendercheck tests > seem consistent with/without this patch. I haven'...

...| 22 +++++++++++----------- 14 files changed, 88 insertions(+), 88 deletions(-) diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index 220d7e5..7797ef4 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -25,22 +25,22 @@ NV110FP_Composite_A8[] = { }; #else -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) ipa pass $r0 a[0x7c] 0x0 0x0 0x1 mufu rcp $r0 $r0 ipa $r3 a[0x94] $r0 0x0 0x1 -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x1) (st 0xf wr 0x0 wt 0x3) (st 0xf wr 0x0 wt 0x1) ipa $r2 a[0x90] $r...

...e type check on ppc, and add config. remove dedicated macro. add one patch to drop overload of rwsem_spin_on_owner and mutex_spin_on_owner. add more comments thanks boqun and Peter's suggestion. This patch set aims to fix lock holder preemption issues. test-case: perf record -a perf bench sched messaging -g 400 -p && perf report before patch: 18.09% sched-messaging [kernel.vmlinux] [k] osq_lock 12.28% sched-messaging [kernel.vmlinux] [k] rwsem_spin_on_owner 5.27% sched-messaging [kernel.vmlinux] [k] mutex_unlock 3.89% sched-messaging [kernel.vmlinux] [k] wait_consid...

...e type check on ppc, and add config. remove dedicated macro. add one patch to drop overload of rwsem_spin_on_owner and mutex_spin_on_owner. add more comments thanks boqun and Peter's suggestion. This patch set aims to fix lock holder preemption issues. test-case: perf record -a perf bench sched messaging -g 400 -p && perf report before patch: 18.09% sched-messaging [kernel.vmlinux] [k] osq_lock 12.28% sched-messaging [kernel.vmlinux] [k] rwsem_spin_on_owner 5.27% sched-messaging [kernel.vmlinux] [k] mutex_unlock 3.89% sched-messaging [kernel.vmlinux] [k] wait_consid...

...ailto:samuel.pitoiset at gmail.com>> wrote: >> >> Nice work! >> >> See my comments below, and double-check if some of them can be >> applied to the shaders I didn't review yet. >> >> I recommend you to test your work because if one sched code is >> wrong, you are likely going to kill your card and reboot your box. :-) >> >> >> On 06/03/2017 04:16 PM, Aaryaman Vasishta wrote: >> >> v2: Add missing delays >> >> This patch adds proper delays to maxwell exa shaders...

...toiset at gmail.com <mailto:samuel.pitoiset at gmail.com>> wrote: > > Nice work! > > See my comments below, and double-check if some of them can be > applied to the shaders I didn't review yet. > > I recommend you to test your work because if one sched code is > wrong, you are likely going to kill your card and reboot your box. :-) > > > On 06/03/2017 04:16 PM, Aaryaman Vasishta wrote: > > v2: Add missing delays > > This patch adds proper delays to maxwell exa shaders. > rendercheck t...

...t; > diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp > index ce78036..101b67f 100644 > --- a/src/shader/exac8nv110.fp > +++ b/src/shader/exac8nv110.fp > @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { > }; > #else > > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) > ipa pass $r0 a[0x7c] 0x0 0x0 0x1 > mufu rcp $r0 $r0 > ipa $r3 a[0x94] $r0 0x0 0x1 > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x1) (st 0xf...

...e type check on ppc, and add config. remove dedicated macro. add one patch to drop overload of rwsem_spin_on_owner and mutex_spin_on_owner. add more comments thanks boqun and Peter's suggestion. This patch set aims to fix lock holder preemption issues. test-case: perf record -a perf bench sched messaging -g 400 -p && perf report 18.09% sched-messaging [kernel.vmlinux] [k] osq_lock 12.28% sched-messaging [kernel.vmlinux] [k] rwsem_spin_on_owner 5.27% sched-messaging [kernel.vmlinux] [k] mutex_unlock 3.89% sched-messaging [kernel.vmlinux] [k] wait_consider_task 3.64%...