search for: scevgep241

...2> %113, <4 x i32> <i32 24, i32 25, i32 26, i32 27> %118 = bitcast <16 x i32>* %uglygep242243 to <4 x i32>* call void @llvm.aarch64.neon.st4.v4i32.p0v4i32(<4 x i32> %114, <4 x i32> %115, <4 x i32> %116, <4 x i32> %117, <4 x i32>* %118) %scevgep241 = getelementptr <16 x i32>, <16 x i32>* %uglygep242243, i64 1 %119 = shufflevector <16 x i32> %112, <16 x i32> %113, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %120 = shufflevector <16 x i32> %112, <16 x i32> %113, <4 x i32> <i32 12, i32 13,...

Hi Renato, Thank you for the answers! First, let me clarify a couple of things and give some context. The patch it looking at VSTn, rather than VLDn (stores seem to be somewhat harder to get the "right" patterns, the pass is doing a good job for loads already) The examples you gave come mostly from loop vectorization, which, as I understand it, was the reason for adding the