Displaying 11 results from an estimated 11 matches for "scevgep15".
2012 Oct 17
4
[LLVMdev] Redundant Add Operation in Code Generation?
I'm curious why I am seeing this:
*%uglygep18.sum = add i32 %lsr_iv8, %tmp45*
%scevgep19 = getelementptr i8* %parBits_017, i32 %uglygep18_sum
%scevgep1920 = bitcast i8* %scevgep19 to i16*
%tmp78 = load i16* %scevgep1920, align 2
* %uglygep14.sum = add i32 %lsr_iv8, %tmp45*
%scevgep15 = getelementptr i8* %extIn_013, i32 %uglygep14_sum
%scevgep1516 = bitcast i8* %scevgep15 to i16*
%tmp79 = load i16* %scevgep1516, align 2
%conv93.i.i = sext i16 %tmp79 to i32
*%uglygep.sum = add i32 %lsr_iv8, %tmp45*
%scevgep11 = getelementptr i8* %sysBits_010, i32 %uglygep_sum
You can s...
2012 Oct 17
0
[LLVMdev] Redundant Add Operation in Code Generation?
...am seeing this:
>
> %uglygep18.sum = add i32 %lsr_iv8, %tmp45
> %scevgep19 = getelementptr i8* %parBits_017, i32 %uglygep18_sum
> %scevgep1920 = bitcast i8* %scevgep19 to i16*
> %tmp78 = load i16* %scevgep1920, align 2
> %uglygep14.sum = add i32 %lsr_iv8, %tmp45
> %scevgep15 = getelementptr i8* %extIn_013, i32 %uglygep14_sum
> %scevgep1516 = bitcast i8* %scevgep15 to i16*
> %tmp79 = load i16* %scevgep1516, align 2
> %conv93.i.i = sext i16 %tmp79 to i32
> %uglygep.sum = add i32 %lsr_iv8, %tmp45
> %scevgep11 = getelementptr i8* %sysBits_010, i32...
2012 Oct 19
3
[LLVMdev] Redundant Add Operation in Code Generation?
...seeing this:
>
> *%uglygep18.sum = add i32 %lsr_iv8, %tmp45*
> %scevgep19 = getelementptr i8* %parBits_017, i32 %uglygep18_sum
> %scevgep1920 = bitcast i8* %scevgep19 to i16*
> %tmp78 = load i16* %scevgep1920, align 2
> * %uglygep14.sum = add i32 %lsr_iv8, %tmp45*
> %scevgep15 = getelementptr i8* %extIn_013, i32 %uglygep14_sum
> %scevgep1516 = bitcast i8* %scevgep15 to i16*
> %tmp79 = load i16* %scevgep1516, align 2
> %conv93.i.i = sext i16 %tmp79 to i32
> *%uglygep.sum = add i32 %lsr_iv8, %tmp45*
> %scevgep11 = getelementptr i8* %sysBits_010, i3...
2012 Oct 19
0
[LLVMdev] Redundant Add Operation in Code Generation?
...m seeing this:
>
> %uglygep18.sum = add i32 %lsr_iv8, %tmp45
> %scevgep19 = getelementptr i8* %parBits_017, i32 %uglygep18_sum
> %scevgep1920 = bitcast i8* %scevgep19 to i16*
> %tmp78 = load i16* %scevgep1920, align 2
> %uglygep14.sum = add i32 %lsr_iv8, %tmp45
> %scevgep15 = getelementptr i8* %extIn_013, i32 %uglygep14_sum
> %scevgep1516 = bitcast i8* %scevgep15 to i16*
> %tmp79 = load i16* %scevgep1516, align 2
> %conv93.i.i = sext i16 %tmp79 to i32
> %uglygep.sum = add i32 %lsr_iv8, %tmp45
> %scevgep11 = getelementptr i8* %sysBits_010, i32...
2012 Oct 19
2
[LLVMdev] Redundant Add Operation in Code Generation?
...t; *%uglygep18.sum = add i32 %lsr_iv8, %tmp45*
>> %scevgep19 = getelementptr i8* %parBits_017, i32 %uglygep18_sum
>> %scevgep1920 = bitcast i8* %scevgep19 to i16*
>> %tmp78 = load i16* %scevgep1920, align 2
>> * %uglygep14.sum = add i32 %lsr_iv8, %tmp45*
>> %scevgep15 = getelementptr i8* %extIn_013, i32 %uglygep14_sum
>> %scevgep1516 = bitcast i8* %scevgep15 to i16*
>> %tmp79 = load i16* %scevgep1516, align 2
>> %conv93.i.i = sext i16 %tmp79 to i32
>> *%uglygep.sum = add i32 %lsr_iv8, %tmp45*
>> %scevgep11 = getelementptr...
2012 Oct 17
2
[LLVMdev] Redundant Add Operation in Code Generation?
...; %uglygep18.sum = add i32 %lsr_iv8, %tmp45
> > %scevgep19 = getelementptr i8* %parBits_017, i32 %uglygep18_sum
> > %scevgep1920 = bitcast i8* %scevgep19 to i16*
> > %tmp78 = load i16* %scevgep1920, align 2
> > %uglygep14.sum = add i32 %lsr_iv8, %tmp45
> > %scevgep15 = getelementptr i8* %extIn_013, i32 %uglygep14_sum
> > %scevgep1516 = bitcast i8* %scevgep15 to i16*
> > %tmp79 = load i16* %scevgep1516, align 2
> > %conv93.i.i = sext i16 %tmp79 to i32
> > %uglygep.sum = add i32 %lsr_iv8, %tmp45
> > %scevgep11 = getelementp...
2012 Oct 19
0
[LLVMdev] Redundant Add Operation in Code Generation?
...t;> %uglygep18.sum = add i32 %lsr_iv8, %tmp45
>> %scevgep19 = getelementptr i8* %parBits_017, i32 %uglygep18_sum
>> %scevgep1920 = bitcast i8* %scevgep19 to i16*
>> %tmp78 = load i16* %scevgep1920, align 2
>> %uglygep14.sum = add i32 %lsr_iv8, %tmp45
>> %scevgep15 = getelementptr i8* %extIn_013, i32 %uglygep14_sum
>> %scevgep1516 = bitcast i8* %scevgep15 to i16*
>> %tmp79 = load i16* %scevgep1516, align 2
>> %conv93.i.i = sext i16 %tmp79 to i32
>> %uglygep.sum = add i32 %lsr_iv8, %tmp45
>> %scevgep11 = getelementptr i8...
2012 Oct 19
0
[LLVMdev] Redundant Add Operation in Code Generation?
...sum = add i32 %lsr_iv8, %tmp45
>>> %scevgep19 = getelementptr i8* %parBits_017, i32 %uglygep18_sum
>>> %scevgep1920 = bitcast i8* %scevgep19 to i16*
>>> %tmp78 = load i16* %scevgep1920, align 2
>>> %uglygep14.sum = add i32 %lsr_iv8, %tmp45
>>> %scevgep15 = getelementptr i8* %extIn_013, i32 %uglygep14_sum
>>> %scevgep1516 = bitcast i8* %scevgep15 to i16*
>>> %tmp79 = load i16* %scevgep1516, align 2
>>> %conv93.i.i = sext i16 %tmp79 to i32
>>> %uglygep.sum = add i32 %lsr_iv8, %tmp45
>>> %scevgep1...
2012 Oct 17
0
[LLVMdev] Redundant Add Operation in Code Generation?
...add i32 %lsr_iv8, %tmp45
>> > %scevgep19 = getelementptr i8* %parBits_017, i32 %uglygep18_sum
>> > %scevgep1920 = bitcast i8* %scevgep19 to i16*
>> > %tmp78 = load i16* %scevgep1920, align 2
>> > %uglygep14.sum = add i32 %lsr_iv8, %tmp45
>> > %scevgep15 = getelementptr i8* %extIn_013, i32 %uglygep14_sum
>> > %scevgep1516 = bitcast i8* %scevgep15 to i16*
>> > %tmp79 = load i16* %scevgep1516, align 2
>> > %conv93.i.i = sext i16 %tmp79 to i32
>> > %uglygep.sum = add i32 %lsr_iv8, %tmp45
>> > %sce...
2020 Jun 24
2
FW: Restrict qualifier on class members
...iv6, !tbaa !14,
!noalias !13, addrspace 1)
SU(9): %40:gpr = LW %55:gpr, 0 :: (load 4 from %ir.lsr.iv12, !tbaa !14,
!noalias !13, addrspace 1)
SU(12): %42:gpr = LW %56:gpr, 4 :: (load 4 from %ir.scevgep9, !tbaa !14,
!noalias !13, addrspace 1)
SU(13): %43:gpr = LW %55:gpr, 4 :: (load 4 from %ir.scevgep15, !tbaa !14,
!noalias !13, addrspace 1)
SU(2): %35:gpr = nsw ADD %34:gpr, %33:gpr
SU(3): SW %35:gpr, %55:gpr, -8 :: (store 4 into %ir.scevgep14, !tbaa !14,
!noalias !13, addrspace 1)
SU(6): %38:gpr = nsw ADD %37:gpr, %36:gpr
SU(7): SW %38:gpr, %55:gpr, -4 :: (store 4 into %ir.scevgep16, !tba...
2020 Jun 22
2
Restrict qualifier on class members
Hi Jeroen,
That's great! I was trying to use the patch, what's the latest version of
the project we could apply it on?
Hi Neil,
That seems like what I can do as well! Do you happen to have some examples
lying around? Maybe a pointer to the planned presentation, if that's okay?
Thank you,
Bandhav
On Mon, Jun 22, 2020 at 1:55 AM Neil Henning <neil.henning at unity3d.com>