search for: scavengeframevirtualregs

...r all instructions CurrInst in block order: > if CurrInst has virtual def > CurrReg = RS->scavenge(CurrInst) > replace virtual def by CurReg > else if Insts has virtual use > replace virtual use by CurReg > RS->forward(CurrInst) > > > Look at scavengeFrameVirtualRegs in PrologEpilogInserter.cpp for more > detail (I left out some, error checking, etc). > > On Sat, Nov 10, 2012 at 6:15 PM, Reed Kotler <rkotler at mips.com> wrote: >> Thanks! >> >> When you say that the client calls "forward", who do you mean? >> &gt...

I'm confused as to the logic used in the register scavenger when it cannot find a free register. I would think that it would want to free up the emergency spill slot immediately after it's use, because otherwise there is a chance of needing to use the emergency slot again and not be able to. Instead it tries to restore it only right before register it is freeing up. Maybe I'm

...: >> if CurrInst has virtual def >> CurrReg = RS->scavenge(CurrInst) >> replace virtual def by CurReg >> else if Insts has virtual use >> replace virtual use by CurReg >> RS->forward(CurrInst) >> >> >> Look at scavengeFrameVirtualRegs in PrologEpilogInserter.cpp for more >> detail (I left out some, error checking, etc). >> >> On Sat, Nov 10, 2012 at 6:15 PM, Reed Kotler <rkotler at mips.com> wrote: >>> Thanks! >>> >>> When you say that the client calls "forward", who d...

...irtual def >>> CurrReg = RS->scavenge(CurrInst) >>> replace virtual def by CurReg >>> else if Insts has virtual use >>> replace virtual use by CurReg >>> RS->forward(CurrInst) >>> >>> >>> Look at scavengeFrameVirtualRegs in PrologEpilogInserter.cpp for more >>> detail (I left out some, error checking, etc). >>> >>> On Sat, Nov 10, 2012 at 6:15 PM, Reed Kotler <rkotler at mips.com> wrote: >>>> Thanks! >>>> >>>> When you say that the client calls &q...

...r to keep vreg1 and vreg2 in. R1 = .... // <- RS current liveness state; we have called RS->forward(It) where It points to here vreg1 = add SP, 1000 ... = load vreg1 ... // more code vreg2 = add SP, 2000 ... = load vreg ... = R1 When you come to the definition of vreg1 you (or lets say the scavengeFrameVirtualRegs function) call the RS to scavenge a register. The current internal state (the liveness information) is the liveness up to (including) the definition of R1. The register scavenger will look for a register - and so lets assume there is none free. Next it looks for one that it can spill and restore fa...

I'm seeing the following warning when compiling LLVM trunk in a Release build: llvm/lib/CodeGen/PrologEpilogInserter.cpp: In member function ‘void llvm::PEI::scavengeFrameVirtualRegs(llvm::MachineFunction&)’: llvm/lib/CodeGen/PrologEpilogInserter.cpp:770: warning: ‘PrevValue’ may be used uninitialized in this function I briefly looked at the code and it looks like PrevValue is used correctly, but there is enough logic here that I'm not familiar with that I coul...

Hello LLVM, The ARM target sometimes adds an instruction with a virtual register in eliminateFrameIndex(): https://github.com/llvm-mirror/llvm/blob/master/lib/Target/ARM/ARMBaseRegisterInfo.cpp This looks late for a virtual register to appear. Where is this vreg made real? Thanks, -steve

...the maximum number of simultanously live > scavenged registers needed > * support in RegScavenger for more than one registers: instead of state > for one register (ScavangedReg, ScavengedRC, ScavengedRestore) we need > need an array of such states that are handled correctly > * PEI::scavengeFrameVirtualRegs must be adopted to handle more than one > register > * PEI::calculateFrameObjectOffsets needs to handle the reserved scavenger > spill slot frame indexes I am not sure extending the scavenger is the right way to go about this. There are two different situations where we might need extra...