search for: savini

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2018 Dec 03
5
Branch relaxation at assembler level (RISCV)
...mizations when compiling directly from assembly code. What I'd like to do would be to add a pass that does that on the MC instructions or at least to find a way to implement this relaxation in the MC assembler. Any suggestions on where/how to do it? Or any existing fixes? Many thanks, Paolo Savini
2019 Aug 14
3
[RFC][RISCV] Selection of complex codegen patterns into RISCV bit manipulation instructions
...gher level? Another point of view that I've been suggested and that I'd like to discuss is: does it make sense to implement such lowering for operations that normally a user wouldn't implement from scratch when an intrinsic function is already available for that? Many thanks. Paolo Savini -------------- next part -------------- A non-text attachment was scrubbed... Name: pEpkey.asc Type: application/pgp-keys Size: 2456 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20190814/858b3f8f/attachment.key>
2019 Aug 15
2
[RFC][RISCV] Selection of complex codegen patterns into RISCV bit manipulation instructions
Hi Roman, > That depends. > If there's LLVM intrinsic for it, then any normal optimization pass could do it. > In cttz's case it's mainly done in LoopIdiom pass. Oh yes. Thank you! Unfortunately several of the instructions of the bit manipulation extension don't seem to have an intrinsic already in LLVM. That will require to add some passes to the middle end. >