search for: saved_context

...ibernate_asm_64.S b/arch/x86/power/hibernate_asm_64.S > index ce8da3a0412c..6fdd7bbc3c33 100644 > --- a/arch/x86/power/hibernate_asm_64.S > +++ b/arch/x86/power/hibernate_asm_64.S > @@ -24,7 +24,7 @@ > #include <asm/frame.h> > > ENTRY(swsusp_arch_suspend) > - movq $saved_context, %rax > + leaq saved_context(%rip), %rax > movq %rsp, pt_regs_sp(%rax) > movq %rbp, pt_regs_bp(%rax) > movq %rsi, pt_regs_si(%rax) > @@ -115,7 +115,7 @@ ENTRY(restore_registers) > movq %rax, %cr4; # turn PGE back on > > /* We don't restore %rax, it must be 0...

...ibernate_asm_64.S b/arch/x86/power/hibernate_asm_64.S > index ce8da3a0412c..6fdd7bbc3c33 100644 > --- a/arch/x86/power/hibernate_asm_64.S > +++ b/arch/x86/power/hibernate_asm_64.S > @@ -24,7 +24,7 @@ > #include <asm/frame.h> > > ENTRY(swsusp_arch_suspend) > - movq $saved_context, %rax > + leaq saved_context(%rip), %rax > movq %rsp, pt_regs_sp(%rax) > movq %rbp, pt_regs_bp(%rax) > movq %rsi, pt_regs_si(%rax) > @@ -115,7 +115,7 @@ ENTRY(restore_registers) > movq %rax, %cr4; # turn PGE back on > > /* We don't restore %rax, it must be 0...

.../resume path. cr8 is an alias of APIC_TASKPRI, and APIC_TASKPRI is saved/restored by lapic_{suspend,resume}(). Saving and restoring cr8 independently of the rest of the Local APIC state isn't a clever thing to be doing. Delete the suspend/resume cr8 handling, which shrinks the size of struct saved_context, and allows for the removal of both PVOPS. Signed-off-by: Andrew Cooper <andrew.cooper3 at citrix.com> --- CC: x86 at kernel.org CC: virtualization at lists.linux-foundation.org CC: Borislav Petkov <bp at alien8.de> CC: Peter Zijlstra <peterz at infradead.org> CC: Andy Lutomirski...

.../resume path. cr8 is an alias of APIC_TASKPRI, and APIC_TASKPRI is saved/restored by lapic_{suspend,resume}(). Saving and restoring cr8 independently of the rest of the Local APIC state isn't a clever thing to be doing. Delete the suspend/resume cr8 handling, which shrinks the size of struct saved_context, and allows for the removal of both PVOPS. Signed-off-by: Andrew Cooper <andrew.cooper3 at citrix.com> --- CC: x86 at kernel.org CC: virtualization at lists.linux-foundation.org CC: Borislav Petkov <bp at alien8.de> CC: Peter Zijlstra <peterz at infradead.org> CC: Andy Lutomirski...

...ved_rbx(%rip), %rbx + movq saved_rdi(%rip), %rdi + movq saved_rsi(%rip), %rsi + movq saved_rbp(%rip), %rbp - movq saved_rip, %rax + movq saved_rip(%rip), %rax jmp *%rax ENDPROC(wakeup_long64) @@ -45,7 +45,7 @@ ENTRY(do_suspend_lowlevel) xorl %eax, %eax call save_processor_state - movq $saved_context, %rax + leaq saved_context(%rip), %rax movq %rsp, pt_regs_sp(%rax) movq %rbp, pt_regs_bp(%rax) movq %rsi, pt_regs_si(%rax) @@ -64,13 +64,14 @@ ENTRY(do_suspend_lowlevel) pushfq popq pt_regs_flags(%rax) - movq $.Lresume_point, saved_rip(%rip) + leaq .Lresume_point(%rip), %rax + movq %rax...

...etions(-) diff --git a/arch/x86/power/hibernate_asm_64.S b/arch/x86/power/hibernate_asm_64.S index ce8da3a0412c..6fdd7bbc3c33 100644 --- a/arch/x86/power/hibernate_asm_64.S +++ b/arch/x86/power/hibernate_asm_64.S @@ -24,7 +24,7 @@ #include <asm/frame.h> ENTRY(swsusp_arch_suspend) - movq $saved_context, %rax + leaq saved_context(%rip), %rax movq %rsp, pt_regs_sp(%rax) movq %rbp, pt_regs_bp(%rax) movq %rsi, pt_regs_si(%rax) @@ -115,7 +115,7 @@ ENTRY(restore_registers) movq %rax, %cr4; # turn PGE back on /* We don't restore %rax, it must be 0 anyway */ - movq $saved_context, %rax +...

...asm_64.S > > index ce8da3a0412c..6fdd7bbc3c33 100644 > > --- a/arch/x86/power/hibernate_asm_64.S > > +++ b/arch/x86/power/hibernate_asm_64.S > > @@ -24,7 +24,7 @@ > > #include <asm/frame.h> > > > > ENTRY(swsusp_arch_suspend) > > - movq $saved_context, %rax > > + leaq saved_context(%rip), %rax > > movq %rsp, pt_regs_sp(%rax) > > movq %rbp, pt_regs_bp(%rax) > > movq %rsi, pt_regs_si(%rax) > > @@ -115,7 +115,7 @@ ENTRY(restore_registers) > > movq %rax, %cr4; # turn PGE...

On Mon, Jul 15, 2019 at 6:23 AM Juergen Gross <jgross at suse.com> wrote: > > On 15.07.19 15:00, Andrew Cooper wrote: > > There is a lot of infrastructure for functionality which is used > > exclusively in __{save,restore}_processor_state() on the suspend/resume > > path. > > > > cr8 is an alias of APIC_TASKPRI, and APIC_TASKPRI is saved/restored > >

On Mon, Jul 15, 2019 at 6:23 AM Juergen Gross <jgross at suse.com> wrote: > > On 15.07.19 15:00, Andrew Cooper wrote: > > There is a lot of infrastructure for functionality which is used > > exclusively in __{save,restore}_processor_state() on the suspend/resume > > path. > > > > cr8 is an alias of APIC_TASKPRI, and APIC_TASKPRI is saved/restored > >

i386 allmodconfig arch/i386/power/cpu.c: In function '__save_processor_state': arch/i386/power/cpu.c:29: warning: passing argument 1 of 'paravirt_ops.store_gdt' from incompatible pointer type arch/i386/power/cpu.c:30: warning: passing argument 1 of 'paravirt_ops.store_idt' from incompatible pointer type arch/i386/power/cpu.c: In function

i386 allmodconfig arch/i386/power/cpu.c: In function '__save_processor_state': arch/i386/power/cpu.c:29: warning: passing argument 1 of 'paravirt_ops.store_gdt' from incompatible pointer type arch/i386/power/cpu.c:30: warning: passing argument 1 of 'paravirt_ops.store_idt' from incompatible pointer type arch/i386/power/cpu.c: In function

...RI, and APIC_TASKPRI is saved/restored by >> lapic_{suspend,resume}(). Saving and restoring cr8 independently of the >> rest of the Local APIC state isn't a clever thing to be doing. >> >> Delete the suspend/resume cr8 handling, which shrinks the size of struct >> saved_context, and allows for the removal of both PVOPS. > I think removing the interface for CR8 writes is also good to avoid > potential correctness issues, as the SDM says (10.8.6.1 "Interaction of Task > Priorities between CR8 and APIC?): > > "Operating software should implement eith...

...RI, and APIC_TASKPRI is saved/restored by >> lapic_{suspend,resume}(). Saving and restoring cr8 independently of the >> rest of the Local APIC state isn't a clever thing to be doing. >> >> Delete the suspend/resume cr8 handling, which shrinks the size of struct >> saved_context, and allows for the removal of both PVOPS. > I think removing the interface for CR8 writes is also good to avoid > potential correctness issues, as the SDM says (10.8.6.1 "Interaction of Task > Priorities between CR8 and APIC?): > > "Operating software should implement eith...

...#include <asm/mtrr.h> #include <asm/mce.h> +#else +#include <xen/config.h> +#include <xen/acpi.h> +#include <xen/smp.h> +#include <asm/processor.h> +#include <asm/msr.h> +#include <asm/flushtlb.h> + +/* image of the saved processor state */ +struct saved_context { + u16 es, fs, gs, ss; + unsigned long cr0, cr2, cr3, cr4; + u16 gdt_pad; + u16 gdt_limit; + unsigned long gdt_base; + u16 idt_pad; + u16 idt_limit; + unsigned long idt_base; + u16 ldt; + u16 tss; + unsigned long tr; + unsigned long safety; + unsigned long return_address; +} __attribute__((packed)...

...tive_wbinvd, .cpu.read_msr = native_read_msr, .cpu.write_msr = native_write_msr, diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c index 24b079e94bc2..1c58d8982728 100644 --- a/arch/x86/power/cpu.c +++ b/arch/x86/power/cpu.c @@ -122,9 +122,6 @@ static void __save_processor_state(struct saved_context *ctxt) ctxt->cr2 = read_cr2(); ctxt->cr3 = __read_cr3(); ctxt->cr4 = __read_cr4(); -#ifdef CONFIG_X86_64 - ctxt->cr8 = read_cr8(); -#endif ctxt->misc_enable_saved = !rdmsrl_safe(MSR_IA32_MISC_ENABLE, &ctxt->misc_enable); msr_save_context(ctxt); @@ -207,7...

...tive_wbinvd, .cpu.read_msr = native_read_msr, .cpu.write_msr = native_write_msr, diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c index 24b079e94bc2..1c58d8982728 100644 --- a/arch/x86/power/cpu.c +++ b/arch/x86/power/cpu.c @@ -122,9 +122,6 @@ static void __save_processor_state(struct saved_context *ctxt) ctxt->cr2 = read_cr2(); ctxt->cr3 = __read_cr3(); ctxt->cr4 = __read_cr4(); -#ifdef CONFIG_X86_64 - ctxt->cr8 = read_cr8(); -#endif ctxt->misc_enable_saved = !rdmsrl_safe(MSR_IA32_MISC_ENABLE, &ctxt->misc_enable); msr_save_context(ctxt); @@ -207,7...

...; > > > Unless I'm missing something, we only build any of the restore code > (including the write_cr8() call) if CONFIG_PM_SLEEP is set, and that > selects CONFIG_PM, so we should be fine, I think. > Okay, in that case I'd suggest to remove "cr8" from struct saved_context as it won't be used any longer. Juergen

...alias of APIC_TASKPRI, and APIC_TASKPRI is saved/restored by > lapic_{suspend,resume}(). Saving and restoring cr8 independently of the > rest of the Local APIC state isn't a clever thing to be doing. > > Delete the suspend/resume cr8 handling, which shrinks the size of struct > saved_context, and allows for the removal of both PVOPS. I think removing the interface for CR8 writes is also good to avoid potential correctness issues, as the SDM says (10.8.6.1 "Interaction of Task Priorities between CR8 and APIC?): "Operating software should implement either direct APIC TPR upda...

...aved/restored by > >> lapic_{suspend,resume}(). Saving and restoring cr8 independently of the > >> rest of the Local APIC state isn't a clever thing to be doing. > >> > >> Delete the suspend/resume cr8 handling, which shrinks the size of struct > >> saved_context, and allows for the removal of both PVOPS. > > I think removing the interface for CR8 writes is also good to avoid > > potential correctness issues, as the SDM says (10.8.6.1 "Interaction of Task > > Priorities between CR8 and APIC?): > > > > "Operating softw...

Changes: - patch v3: - Update on message to describe longer term PIE goal. - Minor change on ftrace if condition. - Changed code using xchgq. - patch v2: - Adapt patch to work post KPTI and compiler changes - Redo all performance testing with latest configs and compilers - Simplify mov macro on PIE (MOVABS now) - Reduce GOT footprint - patch v1: - Simplify ftrace