search for: saram

Displaying 8 results from an estimated 8 matches for "saram".

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2012 Oct 19
0
[LLVMdev] [llvm-commits] [cfe-commits] [PATCH] [llvm+clang] memset for non-8-bit bytes
...ISO/IEC standard. I know of architectures like Texas' C55x DSPs that address 16 bits at a time, but even their data sheets state: • 256K Bytes Zero-Wait State On-Chip RAM, Composed of: • – 64K Bytes of Dual-Access RAM (DARAM), 8 Blocks of 4K x 16-Bit • – 192K Bytes of Single-Access RAM (SARAM), 24 Blocks of 4K x 16-Bit Perhaps you could begin by defining more accurately what you're talking about? /jakob
2012 Oct 19
2
[LLVMdev] [llvm-commits] [cfe-commits] [PATCH] [llvm+clang] memset for non-8-bit bytes
...I know of architectures like Texas' C55x DSPs that address 16 bits at a time, but even their data sheets state: > > • 256K Bytes Zero-Wait State On-Chip RAM, Composed of: > • – 64K Bytes of Dual-Access RAM (DARAM), 8 Blocks of 4K x 16-Bit > • – 192K Bytes of Single-Access RAM (SARAM), 24 Blocks of 4K x 16-Bit > > Perhaps you could begin by defining more accurately what you're talking about? I'm assuming he means an architecture where CHAR_BIT > 8. -Eli
2010 Jul 22
5
choosing a random sample by precentage
hi all i have found the follwoing way to choose a random sample by sample size (200): ten_per_T2000 <- F_T2000_All[sample(nrow(F_T2000_All), 200), ] but i wondered if there is a way to choose a sample size by precentage (10% etc..) thx ethan
2012 Oct 19
0
[LLVMdev] [llvm-commits] [cfe-commits] [PATCH] [llvm+clang] memset for non-8-bit bytes
...tectures like Texas' C55x DSPs that address 16 bits at a time, but even their data sheets state: >> >> • 256K Bytes Zero-Wait State On-Chip RAM, Composed of: >> • – 64K Bytes of Dual-Access RAM (DARAM), 8 Blocks of 4K x 16-Bit >> • – 192K Bytes of Single-Access RAM (SARAM), 24 Blocks of 4K x 16-Bit >> >> Perhaps you could begin by defining more accurately what you're talking about? > > I'm assuming he means an architecture where CHAR_BIT > 8. AFAIK, CHAR_BIT isn't a property of the architecture, but of the C implementation. One c...
2012 Oct 19
3
[LLVMdev] [cfe-commits] [PATCH] [llvm+clang] memset for non-8-bit bytes
> Please start a thread on llvmdev about this functionality, and outline what other intrinsics will have to change to add non-8-bit byte support. Well, memset is the only we have seen so far (our back-end is ~50% finished for an initial release). We have our own front-end as well (we are currently not using the clang front-end), and currently don't use many llvm intrinsics (only
2010 Jul 25
1
error using "predict"
Hi I am very new to R (so excuse me in advance if this is pretty trivial) I am using the predict function to get prediction on a dataset from another dataset using the follwoing command: newpredT2003 = predict( object=out.model_T2003, newdata=aodmc_2003 , level = 0 ) yet i get this error: Error in na.fail.default(list(AOD = c(0.092, 0.081, 0.086, 0.085, 0.09, : missing values in object
2012 Oct 19
4
[LLVMdev] [llvm-commits] [cfe-commits] [PATCH] [llvm+clang] memset for non-8-bit bytes
...ISO/IEC standard. I know of architectures like Texas' C55x DSPs that address 16 bits at a time, but even their data sheets state: . 256K Bytes Zero-Wait State On-Chip RAM, Composed of: . - 64K Bytes of Dual-Access RAM (DARAM), 8 Blocks of 4K x 16-Bit . - 192K Bytes of Single-Access RAM (SARAM), 24 Blocks of 4K x 16-Bit Perhaps you could begin by defining more accurately what you're talking about? /jakob
2011 Jan 22
0
how to call BayesX in R to see the graph
...nverge and produce a warning (Douglas Bates) 42. Re: nlminb doesn't converge and produce a warning (Ravi Varadhan) 43. Re: Unexpected Gap in simple line plot (Duncan Murdoch) 44. Marginality rule between powers and interaction terms in lm() (JiHO) 45. extracting random intercept (Xebar Saram) 46. Extracting random intercept (Xebar Saram) 47. Re: Inconsisten graphics i/o when using Rscript versus GUI (MacQueen, Don) 48. Re: complex transformation of data (Henrique Dallazuanna) 49. Re: complex transformation of data (Henrique Dallazuanna) 50. Information (Akash) 51. Re: comple...