Displaying 20 results from an estimated 128 matches for "saito".
2018 Jul 02
2
[RFC][VECLIB] how should we legalize VECLIB calls?
...now.
So yes, I think that would allow us to remove the VecLib mappings because
we are always waiting until codegen to make the translation from generic IR
to target-specific libcall. Or is there some reason that the vectorizer
needs to be aware of those libcalls?
On Mon, Jul 2, 2018 at 11:52 AM, Saito, Hideki <hideki.saito at intel.com>
wrote:
>
>
> Venkat, we did not invent LLVM’s VecLib functionality. The original
> version of D19544 (https://reviews.llvm.org/D19544?id=55036) was indeed a
> separate pass to convert widened math lib to SVML.
>
> Our preference for “v...
2018 Jul 02
8
[RFC][VECLIB] how should we legalize VECLIB calls?
On 07/02/2018 04:33 PM, Saito, Hideki wrote:
>
>
>
> >It may not be a full solution for the problems you're trying to solve
>
>
>
> If we are inventing a new solution, I’d like it also to solve OpenMP
> declare simd legalization issue. If a small extension of existing scheme
>
> works...
2018 Sep 13
2
Loop Distribution pass
...#39;t depend on Transform. I think we should start from a utility but should implement it in such a way to make it easy to convert to an analysis pass.
Thanks,
Hideki
-----Original Message-----
From: Renato Golin [mailto:renato.golin at linaro.org]
Sent: Thursday, September 13, 2018 10:10 AM
To: Saito, Hideki <hideki.saito at intel.com>
Cc: Jonas Paulsson <paulsson at linux.vnet.ibm.com>; LLVM Dev <llvm-dev at lists.llvm.org>; Adam Nemet <anemet at apple.com>; Sanjay Patel <spatel at rotateright.com>; Ulrich Weigand <ulrich.weigand at de.ibm.com>; Zaks, Ayal &...
2018 Jul 02
2
[RFC][VECLIB] how should we legalize VECLIB calls?
...else
> Results.push_back(ExpandFPLibCall(Node, RTLIB::LOG_F32,
> RTLIB::LOG_F64,
> RTLIB::LOG_F80, RTLIB::LOG_F128,
> RTLIB::LOG_PPCF128));
>
>
>
>
> On Fri, Jun 29, 2018 at 2:15 PM, Saito, Hideki <hideki.saito at intel.com>
> wrote:
>
>>
>>
>> Ashutosh,
>>
>>
>>
>> Thanks for the repy.
>>
>>
>>
>> Related earlier topic on this appears in the review of the SVML patch
>> (@mmasten). Adding few names fr...
2019 Feb 01
3
[RFC] Vector Predication
...the lower
20-elements parts of the whole thing.
I think this scenario answers Philip’s question on why separate mask and VF parameters and why VF can’t be conservatively deduced from the mask/mask compute.
From: Bruce Hoult [mailto:bruce at hoult.org]
Sent: Thursday, January 31, 2019 5:13 PM
To: Saito, Hideki <hideki.saito at intel.com>
Cc: Philip Reames <listmail at philipreames.com>; Robin Kruppe <robin.kruppe at gmail.com>; David Greene <dag at cray.com>; via llvm-dev <llvm-dev at lists.llvm.org>; Maslov, Sergey V <sergey.v.maslov at intel.com>; Topper, Cra...
2018 Sep 13
2
Loop Distribution pass
...still remains, we could expand into working on vectorization enabling transformations, but I really hope there are others who can work in that area before us.
Hideki
-----Original Message-----
From: Renato Golin [mailto:renato.golin at linaro.org]
Sent: Thursday, September 13, 2018 11:27 AM
To: Saito, Hideki <hideki.saito at intel.com>
Cc: Jonas Paulsson <paulsson at linux.vnet.ibm.com>; LLVM Dev <llvm-dev at lists.llvm.org>; Adam Nemet <anemet at apple.com>; Sanjay Patel <spatel at rotateright.com>; Ulrich Weigand <ulrich.weigand at de.ibm.com>; Zaks, Ayal &...
2016 May 20
5
Working on FP SCEV Analysis
...romoting support for case A (= FP primary induction variable).
From: Chandler Carruth [mailto:chandlerc at google.com]
Sent: Thursday, May 19, 2016 7:03 PM
To: Demikhovsky, Elena <elena.demikhovsky at intel.com>; anemet at apple.com; Sanjoy Das <sanjoy at playingwithpointers.com>
Cc: Saito, Hideki <hideki.saito at intel.com>; llvm-dev <llvm-dev at lists.llvm.org>; Andrew Trick <atrick at apple.com>
Subject: Re: [llvm-dev] Working on FP SCEV Analysis
On Thu, May 19, 2016 at 7:03 AM Demikhovsky, Elena <elena.demikhovsky at intel.com<mailto:elena.demikhovsky at...
2016 May 20
0
Working on FP SCEV Analysis
Hi Hideki,
I like this summary overall, thanks. More below.
> On May 20, 2016, at 10:04 AM, Saito, Hideki <hideki.saito at intel.com> wrote:
>
>
> To the best of my experience, handling case B (secondary induction) is must-have, and if I’m not mistaken,
> people aren’t opposed to that.
>
> For me, handling case A (primary induction) is “why not?”, but I certainly ad...
2018 Jun 29
2
[RFC][VECLIB] how should we legalize VECLIB calls?
...to Phabricator as a starting point
to get to 2.b)/2.c).
Continue waiting for more feedback. I guess I shouldn't expect a lot this week and next due to the big holiday in the U.S.
Thanks,
Hideki
From: Nema, Ashutosh [mailto:Ashutosh.Nema at amd.com]
Sent: Thursday, June 28, 2018 11:37 PM
To: Saito, Hideki <hideki.saito at intel.com>
Cc: llvm-dev at lists.llvm.org
Subject: RE: [RFC][VECLIB] how should we legalize VECLIB calls?
Hi Saito,
At AMD we have our own version of vector library and faced similar problems, we followed the SVML path and from vectorizer generated the respective ve...
2018 Sep 14
2
Loop Distribution pass
On 09/13/2018 02:43 PM, Renato Golin via llvm-dev wrote:
> On Thu, 13 Sep 2018 at 18:46, Saito, Hideki <hideki.saito at intel.com> wrote:
>> This all depends on those who are working on other loop xforms, since we currently don't have bandwidth to drive that kind of changes into other loop xforms. That's why when this line of questions pops up, I offer to work together. S...
2019 Jun 24
2
RFC: Interface user provided vector functions with the vectorizer.
...quot; type) while we continue working out the details on non-trivial cases.
Thanks,
Hideki
From: Doerfert, Johannes [mailto:jdoerfert at anl.gov]
Sent: Monday, June 24, 2019 9:21 AM
To: Francesco Petrogalli <Francesco.Petrogalli at arm.com>; Tian, Xinmin <xinmin.tian at intel.com>
Cc: Saito, Hideki <hideki.saito at intel.com>; Simon Moll <moll at cs.uni-saarland.de>; LLVM Development List <llvm-dev at lists.llvm.org>; Clang Dev <cfe-dev at lists.llvm.org>; Renato Golin <rengolin at gmail.com>; Finkel, Hal J. <hfinkel at anl.gov>; Andrea Bocci <an...
2018 Jan 09
1
RFC: [LV] any objections in moving isLegalMasked* check from Legal to CostModel? (Cleaning up LoopVectorizationLegality)
...it's appropriate to limit it to masked load/store/gather/scatter. Would need some extensibility, and I think that should be discussed as a separate review.
Stay Tuned.
Hideki
-----Original Message-----
From: Hal Finkel [mailto:hfinkel at anl.gov]
Sent: Saturday, January 06, 2018 9:20 PM
To: Saito, Hideki <hideki.saito at intel.com>; aemerson at apple.com
Cc: llvm-dev at lists.llvm.org; Demikhovsky, Elena <elena.demikhovsky at intel.com>; Amara Emerson <amara.emerson at arm.com>; Stotzer, Eric <estotzer at ti.com>; Nemanja Ivanovic <nemanja.i.ibm at gmail.com>;...
2018 Jan 06
2
RFC: [LV] any objections in moving isLegalMasked* check from Legal to CostModel? (Cleaning up LoopVectorizationLegality)
...is part of that picture. That makes it a lot easier for us to place those things within VPlan infrastructure and explain why that's
the best place.
Thanks,
Hideki
-----Original Message-----
From: aemerson at apple.com [mailto:aemerson at apple.com]
Sent: Friday, January 05, 2018 3:38 PM
To: Saito, Hideki <hideki.saito at intel.com>
Cc: llvm-dev at lists.llvm.org; Hal Finkel <hfinkel at anl.gov>; Demikhovsky, Elena <elena.demikhovsky at intel.com>; Amara Emerson <amara.emerson at arm.com>; Stotzer, Eric <estotzer at ti.com>; Nemanja Ivanovic <nemanja.i.ibm at...
2018 Aug 03
2
Vectorizing remainder loop
...inder is just as legal to vectorize as main vector loop, you should be able to avoid that if you take this approach.
You still have two approaches to unblock yourself in the short term.
Thanks,
Hideki
From: hameeza ahmed [mailto:hahmed2305 at gmail.com]
Sent: Friday, August 03, 2018 10:58 AM
To: Saito, Hideki <hideki.saito at intel.com>
Cc: Craig Topper <craig.topper at gmail.com>; Hal Finkel <hfinkel at anl.gov>; Friedman, Eli <efriedma at codeaurora.org>; ashutosh.nema at amd.com; llvm-dev at lists.llvm.org
Subject: Re: Vectorizing remainder loop
Thank You so much...
T...
2018 Sep 13
2
Loop Distribution pass
...ro.org]
Sent: Thursday, September 13, 2018 1:48 AM
To: Jonas Paulsson <paulsson at linux.vnet.ibm.com>
Cc: LLVM Dev <llvm-dev at lists.llvm.org>; Adam Nemet <anemet at apple.com>; Sanjay Patel <spatel at rotateright.com>; Ulrich Weigand <ulrich.weigand at de.ibm.com>; Saito, Hideki <hideki.saito at intel.com>; Zaks, Ayal <ayal.zaks at intel.com>; Caballero, Diego <diego.caballero at intel.com>; Florian Hahn <florian.hahn at arm.com>
Subject: Re: Loop Distribution pass
On Thu, 13 Sep 2018 at 09:22, Jonas Paulsson <paulsson at linux.vnet.ibm....
2018 Jan 07
0
RFC: [LV] any objections in moving isLegalMasked* check from Legal to CostModel? (Cleaning up LoopVectorizationLegality)
On 01/05/2018 06:28 PM, Saito, Hideki wrote:
> Amara,
>
>> I support this direction
> Thanks for the support.
>
>> but are there actually any real world workloads where gather/scatter scalarisation would be worth it, on any micro-architecture? If we don’t have examples and the compile time cost is non-ne...
2017 Oct 16
2
[RFC] Polly Status and Integration
...,
Hideki
-----Original Message-----
From: Renato Golin [mailto:renato.golin at linaro.org]
Sent: Monday, October 16, 2017 4:59 AM
To: Hal Finkel <hfinkel at anl.gov>
Cc: Daniel Berlin <dberlin at dberlin.org>; Michael Kruse <llvmdev at meinersbur.de>; llvm-dev at lists.llvm.org; Saito, Hideki <hideki.saito at intel.com>; Rapaport, Gil <gil.rapaport at intel.com>; Zaks, Ayal <ayal.zaks at intel.com>
Subject: Re: [llvm-dev] [RFC] Polly Status and Integration
On 15 October 2017 at 00:57, Hal Finkel via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> I thi...
2016 May 24
1
Working on FP SCEV Analysis
...he powerful reasoning capabilities of SCEV, but for the B-like cases
it should work.
Amara
On 20 May 2016 at 19:31, Adam Nemet via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> Hi Hideki,
>
> I like this summary overall, thanks. More below.
>
> On May 20, 2016, at 10:04 AM, Saito, Hideki <hideki.saito at intel.com> wrote:
>
>
> To the best of my experience, handling case B (secondary induction) is
> must-have, and if I’m not mistaken,
> people aren’t opposed to that.
>
> For me, handling case A (primary induction) is “why not?”, but I certainly
&g...
2018 Jul 04
2
[RFC][VECLIB] how should we legalize VECLIB calls?
Hi,
On 4 July 2018 at 07:42, Nema, Ashutosh via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> + llvm-dev
>
> -----Original Message-----
> From: Nema, Ashutosh
> Sent: Wednesday, July 4, 2018 12:12 PM
> To: Hal Finkel <hfinkel at anl.gov>; Saito, Hideki <hideki.saito at intel.com>;
> Sanjay Patel <spatel at rotateright.com>; mzolotukhin at apple.com
> Cc: dccitaliano at gmail.com; Masten, Matt <matt.masten at intel.com>
> Subject: RE: [llvm-dev] [RFC][VECLIB] how should we legalize VECLIB calls?
>
> Hi Hal,...
2019 Jun 10
2
[RFC] Expose user provided vector function for auto-vectorization.
...e "hardcoded" usage of OMP's Vector Function ABI.
Thanks,
Andrei
-----Original Message-----
From: Francesco Petrogalli <Francesco.Petrogalli at arm.com>
Sent: Monday, June 10, 2019 11:38
To: Elovikov, Andrei <andrei.elovikov at intel.com>
Cc: llvm-dev at lists.llvm.org; Saito, Hideki <hideki.saito at intel.com>
Subject: Re: [RFC] Expose user provided vector function for auto-vectorization.
> On Jun 10, 2019, at 1:09 PM, Elovikov, Andrei <andrei.elovikov at intel.com> wrote:
>
> Hi Francesco,
>
Hello!
>> I am crafting the attribute so t...