Displaying 20 results from an estimated 61 matches for "saddly".
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sadly
2010 Aug 09
2
[LLVMdev] Overflow trap
Several instruction set architectures include arithmetic operations that can
trap on overflow, or support this feature with a separate
trap-on-overflow-flag instruction (such as the x86 INTO instruction).
I am adding a back-end to the Open Dylan compiler to generate LLVM IR. The
original back-end, which generates x86 machine code, makes use of the INTO
instruction, and the runtime turns the
2009 Jul 30
2
[LLVMdev] How to produce a "Intrinsic Function" call instruction?
Hi, all.
I have noticed that LLVM supports some Intrinsic Functions such as *"**
llvm.sadd.with.overflow"* described in
http://llvm.org/docs/LangRef.html#int_sadd_overflow. We can use these
functions and needn't define the function bodies.
For example, I can manually insert codes:
* %res = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
%sum = extractvalue
2010 Aug 10
0
[LLVMdev] Overflow trap
On Aug 9, 2010, at 10:44 AM, Peter S. Housel wrote:
> Several instruction set architectures include arithmetic operations that can trap on overflow, or support this feature with a separate trap-on-overflow-flag instruction (such as the x86 INTO instruction).
>
>
> I am adding a back-end to the Open Dylan compiler to generate LLVM IR. The original back-end, which generates x86
2010 Aug 10
2
[LLVMdev] Overflow trap
After chatting on IRC, Peter wants a very specific interrupt (int4 on x86). I suggested he add a new llvm.x86.int(i32) intrinsic, and use the existing branch on llvm.sadd.with.overflow intrinsic. The x86 backend can then turn jo+int4 into into when reasonable.
-Chris
On Aug 9, 2010, at 5:45 PM, Chris Lattner wrote:
>
> On Aug 9, 2010, at 10:44 AM, Peter S. Housel wrote:
>
>>
2015 Feb 17
5
[LLVMdev] why llvm does not have uadd, iadd node
Hi guys,
I just noticed that the LLVM has some node for signed/unsigned type( like udiv, sdiv), but why the ADD, SUB do not have the counter part sadd, uadd?
best
kevin
2010 Aug 22
0
[LLVMdev] [PATCH] Re: Overflow trap
The enclosed patch adds a llvm.x86.int(i8) intrinsic expanding to the INT or INT3 instruction as appropriate. I haven't yet figured out the best way to select for the INTO instruction across basic blocks (hints would be welcome), but that can be added later with no changes in semantics.
-Peter-
On Aug 9, 2010, at 6:05 PM, Chris Lattner wrote:
> After chatting on IRC, Peter wants a very
2019 Feb 09
2
how experimental are the llvm.experimental.vector.reduce.* functions?
I'm interested in using @llvm.experimental.vector.reduce.smax/umax to
implement runtime overflow checking for vectors. Here's an example
checked addition, without vectors, and then I'll follow the example with
what I would do for checked addition with vectors.
Frontend code (zig):
export fn entry() void {
var a: i32 = 1;
var b: i32 = 2;
var x = a + b;
}
LLVM IR code:
2019 Feb 09
2
how experimental are the llvm.experimental.vector.reduce.* functions?
The IR update to allow vector types was here:
https://reviews.llvm.org/D57090
...we didn't update the docs at that time because it was not clear what the
backend would do with that, but that might've changed with some of the more
recent patches.
On Sat, Feb 9, 2019 at 1:42 AM Craig Topper via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> I don't think I understand your
2019 Feb 09
2
how experimental are the llvm.experimental.vector.reduce.* functions?
On Sat, Feb 9, 2019 at 6:25 PM Simon Pilgrim <llvm-dev at redking.me.uk> wrote:
> The add/sub (+mul) overflow intrinsics are being updated to support
> vectors to match the related add/sub saturation intrinsics. We haven't
> updated the docs yet as legalization, vectorization and various minor bits
> of plumbing still need to be finished before it can be officially supported
2009 Apr 30
1
stepAICc
Dear R users,
Would it be difficult to change the code of stepAIC (from the MASS
library) to use AICc instead of AIC?
It would be great to know of someone has tried this already.
Best wishes
Christoph.
2015 Dec 01
10
[RFC] Intrinsic naming convention (words with dots)
Hi everyone,
We seem to have allowed our documented target-independent intrinsics to acquire a somewhat-haphazard naming system, and I think we should standardize on one convention. All of the intrinsics have 'llvm.' as a prefix, and some also have some additional prefix 'llvm.dbg.', 'llvm.eh.', 'llvm.experimental.', etc., but after that we lose consistency. When
2009 Nov 22
1
Metaplot Axis Annotation
Hello,
We are looking to adjust the font size of the axis annotation on the graph
that results from use of the metaplot() function. Metaplot seems to respond
to cex and cex.lab to change those graphical parameters, but it doesn't
respond to cex.axis. Is there a way to work around this by creating a
customized x-axis, and if so, how?
Thanks for all your help. Syntax is below.
Best,
Dawn
2016 May 08
3
x.with.overflow semantics question
Hi Pete,
> Or do you mean that the result of an add may not even be defined? In
that case would reading it be considered UB in the case where the
overflow bit was set?
Yeah, this is the case I'm worried about: that for example
sadd.with.overflow(INT_MAX, 1) might be designed to return { poison,
true } instead of giving a useful result in the first element of the struct.
John
2005 May 05
2
[LLVMdev] (no subject)
>> In other words, abandoning overflow detection makes the
>> duplication of types redundant, while requiring it would be a
>> great burden on CPUs that don't have overflow exception hardware.
>
>Yes, you're right. This has been a desired change for quite some time
>now. Unfortunately, its a huge impact to nearly every part of LLVM. We
>will
2007 Nov 19
5
Howto modify samba printer ACLs without Windows?
Hi all,
I would like to limit access to our samba shared printers to certain
user groups by commandline without using Windows. Is this possible?
Thanks!
Christoph
2016 May 09
2
x.with.overflow semantics question
CGP also relies on the add being a simple two's complement add, since it will transform
define void @test1(i64 %a, i64 %b, i64* %res_i64, i1* %res_i1) {
entry:
%add = add i64 %b, %a
%cmp = icmp ult i64 %add, %a
store i1 %cmp, i1* %res_i1
store i64 %add, i64* %res_i64
ret void
}
to
define void @test1(i64 %a, i64 %b, i64* %res_i64, i1* %res_i1) {
entry:
%uadd.overflow = call
2019 Feb 09
2
how experimental are the llvm.experimental.vector.reduce.* functions?
Something like this should work I think.
; ModuleID = 'test.ll'
source_filename = "test.ll"
define void @entry(<4 x i32>* %a, <4 x i32>* %b, <4 x i32>* %x) {
Entry:
%tmp = load <4 x i32>, <4 x i32>* %a, align 16
%tmp1 = load <4 x i32>, <4 x i32>* %b, align 16
%tmp2 = add <4 x i32> %tmp, %tmp1
%tmpsign = icmp slt <4 x
2019 Jul 02
2
RFC: Complex in LLVM
> Why? I'd prefer we avoid introducing even more special cases. Is there
> any reason why we should not define "complex <scalar type>", or to be
> more restrictive, "complex <floating-point type>"? I really don't like
> the idea of excluding 128-bit complex types, and I think that we can
> have a generic facility.
Hal, we had 128-bit
2014 Apr 24
4
[LLVMdev] Proposal: add intrinsics for safe division
Hi,
I’d like to propose to extend LLVM IR intrinsics set, adding new ones for safe-division. There are intrinsics for detecting overflow errors, like sadd.with.overflow, and the intrinsics I’m proposing will augment this set.
The new intrinsics will return a structure with two elements according to the following rules:
safe.[us]div(x,0) = safe.[us]rem(x,0) = {0, 1}
safe.sdiv(min<T>, -1) =
2008 Dec 09
1
[LLVMdev] [PATH] Add sub.ovf/mul.ovf intrinsics
Hi,
The add.with.overflow instrinsics don't seem to work with constant
arguments, i.e.
changing the call in add-with-overflow.ll to:
%t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 0, i32 0)
causes the following exception when running the codegen tests:
llc: DAGCombiner.cpp:646:
void<unnamed>::DAGCombiner::Run(llvm::CombineLevel): Assertion
`N->getValueType(0) ==