search for: sachin345678

Displaying 7 results from an estimated 7 matches for "sachin345678".

2014 Oct 08
3
[LLVMdev] Need guidance regarding MachineFunctionPass
...write 'get(AArch64::LDRXui)' then there is an error generated which says: use of undeclared identifier 'get'. Thanks again !! On Fri, Oct 3, 2014 at 9:56 PM, Tim Northover <t.p.northover at gmail.com> wrote: > Hi Sachin, > > On 3 October 2014 13:24, sachin arora <sachin345678 at gmail.com> wrote: > > Thank you Mr. Tim. Is "AArch64" a namespace? Because when I tried > > "X86::MOV", it gave me an error saying that first define X86 namespace. > > Sorry if I sound stupid but I am new to LLVM. Thank you again. > > Yes, AArch64 i...
2014 Oct 03
2
[LLVMdev] Need guidance regarding MachineFunctionPass
Thank you Mr. Tim. Is "AArch64" a namespace? Because when I tried "X86::MOV", it gave me an error saying that first define X86 namespace. Sorry if I sound stupid but I am new to LLVM. Thank you again. On Thu, Oct 2, 2014 at 8:16 PM, Tim Northover <t.p.northover at gmail.com> wrote: > Hi Sachin, > > > int op = mi->getOpcode(); > > This is
2015 Nov 12
2
Building SPEC CPU2006 Fortran benchmarks with llvm
Hello, I have built llvm with some added Machine Function Passes and I am trying to use it to build the SPEC CPU2006 benchmarks. I am using llvm test-suite to build the benchmarks. I configured the test-suite with "--with-f2c" but still none of the fortran benchmarks are built or compiled. I tried running simple and nightly tests. Kindly let me know if I am missing some steps and if not
2014 Oct 03
2
[LLVMdev] Need guidance regarding MachineFunctionPass
Respected Dr. Criswell, My problem is that the output of following code looks nothing like any opcode: *for(MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) { MachineInstr *mi = I; int op = mi->getOpcode(); std::cout << op << '\t'; }* I need to identify specific instructions in my MachineFunctionPass and I was hoping that I can
2014 Oct 02
2
[LLVMdev] Need guidance regarding MachineFunctionPass
Hello, I am writing a MachineFunctionPass that inspects the generated machine code, and examines each opcode and its corresponding operands. If the 'instruction + operands' match a particular sequence, then the pass should replace them with a fixed instruction + operands sequence. I tried using MachineInstr's getOpcode and getOperand functions but the pass didn't work as expected.
2014 Sep 12
2
[LLVMdev] Is it necessary to implement the whole backend in order to add a new "pass" to the backend ?
Hello all, I am new to llvm. I need to make some changes to the LR. The backend should modify the LR, but only after all the normal work and all the optimizations are done. Just before outputting the native code, LR is modified. I was wondering if I should implement the whole backend in order to achieve this or is it possible to implement a new pass and use that. Thanks ! Regards, Sachin
2014 Sep 17
3
[LLVMdev] Need guidance regarding MachineFunctionPass implementation
Hello all, I need to modify llvm bytecode / native code just before it is emitted i.e. after all the regular operations and optimizations are done. I was told that this can be achieved by implementing a MachineFunctionPass. I searched the internet for some tutorials or some example MachineFunctionPass but found nothing. Kindly point some links, or anything that may help. Thank you. Regards,