Displaying 20 results from an estimated 247 matches for "saarlandes".
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saarland
2014 Sep 08
2
[LLVMdev] Alias Analysis - ModRefBehaviour
Hello,
Is there a analysis pass which calculates the ModRefBehaviours
OnlyReadsPointerArguments and OnlyAccessesPointerArguments?
I tried to find one but so far I only saw that different AA's return
OnlyReadsMemory and DoesNotAccessMemory if the readonly and readnone
attributes are set.
Best regards and thanks in advance,
Johannes
--
Johannes Doerfert
Researcher / PhD Student
2017 Feb 22
3
[EuroLLVM] Program available! Hacker's Lab topics wanted!
We are happy to announce that the list of accepted sessions is available
online [0].
The hacker's lab will be organized similar to the one at the US 2016
meeting [1]. To this end, we rely on you to send us topics via mail:
eurollvm17-orga at cs.uni-saarland.de
We will then look for knowledgeable volunteers and have a selection
process to determine which are most interesting for the
2014 Sep 20
2
[LLVMdev] How to translate library functions into LLVM IR bitcode?
Hi Johannes,
Actually, I'm working in the same scenario, i.e. configure + make of a
benchmark/program/library like you said. I've got your point of using this
script as a replacement to generate .bc files instead of a executable.
That's truly helpful and has already answered my original question.
Now I'm actually moving a step further. Take the same example in your
reply, say, if
2016 Dec 12
0
LLVM possible projects
@Vivek, thanks for your answer and especially these links!
I just want to add two more though I am not sure if they are useful
here:
- Some slides [0] that explain the general structure of LLVM and LLVM-IR I
used in our compiler class last year [0].
- Examples that build LLVM-IR "from scratch". These were designed to
help students to build an LLVM-IR frontend for their AST.
2017 Mar 13
2
[llvm-devmeeting] [EuroLLVM] Hacker's Lab - Topics and Volunteers needed!
Registered, thx!
On 03/13, Renato Golin wrote:
> On 13 March 2017 at 13:01, Tobias Grosser <tobias.grosser at inf.ethz.ch> wrote:
> > I am happy to merge these things.
>
> Ok. We'll need a big table. :)
--
Johannes Doerfert
Researcher / PhD Student
Compiler Design Lab (Prof. Hack)
Saarland Informatics Campus, Germany
Building E1.3, Room 4.31
Tel. +49 (0)681
2019 Feb 01
3
[RFC] Vector Predication
Hi,
On 1/31/19 11:20 PM, Jacob Lifshay wrote:
> We're in-progress designing a RISC-V extension
> (http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-January/000433.html)
> that would have variable-length vectors of short vectors (1 to 4):
> <VL x <4 x float>>
> where each predicate bit masks out a whole short vector. We're using
> this extension
2015 Feb 09
2
[LLVMdev] [lld] Need help: "buildbot failure in LLVM on lld-x86_64-freebsd"
Hey,
I was just informed that my ScalarEvolution patch failed the lld tests
on x86_64-freebsd, however on my machine x86_64-linux all tests
(llvm+lld) pass for a debug as well as a release build. Furthermore, I'm
a bit confused about the error message just before the segfault happens:
"Unable to find lib.exe in PATH"
Could somebody help me track down the problem?
Thanks in
2019 Feb 04
4
[RFC] Vector Predication
On 2/2/19 1:39 AM, Luke Kenneth Casson Leighton wrote:
>
>
> On Friday, February 1, 2019, Simon Moll <moll at cs.uni-saarland.de
> <mailto:moll at cs.uni-saarland.de>> wrote:
>
> We could untie the mask length from the data length:
>
> %result = call <scalable 4 x float>
> @llvm.evl.fsub.v4f32(<scalable 4 x float> %x, <scalable 4
2019 Feb 08
5
[RFC] Vector Predication
On Thu, Feb 7, 2019, 09:21 Simon Moll <moll at cs.uni-saarland.de> wrote:
>
> On 2/7/19 6:08 PM, David Greene wrote:
> > Jacob Lifshay <programmerjake at gmail.com> writes:
> >
> >> So it would be handy for the vector length on evl intrinsics to be in
> >> units of the mask length so we don't have to pattern match a division
> >> in the
2017 Mar 08
4
(no subject)
".... the problem Mehdi pointed out regarding the missed initializations of array elements, did you comment on that one yet?"
What is the initializations of array elements question? I don't remember this question. Please refresh my memory. Thanks.
I thought Mehdi's question is more about what are attributes needed for these IR-annotation for other LLVM pass to understand and
2014 Sep 24
2
[LLVMdev] noalias and alias.scope metadata producers
Hal, Johannes,
Thanks for the feedback. I have been digging into this a little bit more
and was able to have some of this metadata being generated. Nevertheless, I
am confused about the semantics of this metadata. Let me explain:
I was expecting the alias metadata to complement the information that alias
analysis passes compute. However, it seems that the alias information of
the pointers used
2014 Sep 20
2
[LLVMdev] How to translate library functions into LLVM IR bitcode?
Hi Johannes,
By following your directions, I can use your script as is to produce the
.bc file now. Here's my command line for compiling s_sin.c into s_sin.bc
file and the output:
command line:
~/Downloads/newlib-2.1.0/newlib/libm/mathfp » python ~/llvm_link.py s_sin.c
-I../common/ -I../../libc/include/ -o s_sin.bc
output:
Initiate CLANG (/path-to-clang):
Options: 's_sin.c
2017 Mar 08
3
(no subject)
> On Mar 8, 2017, at 10:55 AM, Mehdi Amini <mehdi.amini at apple.com> wrote:
>
>>
>> On Mar 8, 2017, at 5:36 AM, Johannes Doerfert <doerfert at cs.uni-saarland.de> wrote:
>>
>> <mehdi.amini at apple.com>,
>> Bcc:
>> Subject: Re: [llvm-dev] [RFC][PIR] Parallel LLVM IR -- Stage 0 -- IR extension
>> Reply-To:
>>
2017 Jan 20
2
[RFC] IR-level Region Annotations
On 01/11, Daniel Berlin via llvm-dev wrote:
> >
> > def int_experimental_directive : Intrinsic<[], [llvm_metadata_ty],
> > [IntrArgMemOnly],
> > "llvm.experimental.directive">;
> >
> > def int_experimental_dir_qual : Intrinsic<[], [llvm_metadata_ty],
> > [IntrArgMemOnly],
> >
2017 Mar 08
5
(no subject)
<mehdi.amini at apple.com>,
Bcc:
Subject: Re: [llvm-dev] [RFC][PIR] Parallel LLVM IR -- Stage 0 -- IR extension
Reply-To:
In-Reply-To: <20170224221713.GA931 at arch-linux-jd.home>
Ping.
PS.
Are there actually people interested in this?
We will continue working anyway but it might not make sense to put it
on reviews and announce it on the ML if nobody cares.
On 02/24,
2017 Mar 08
2
(no subject)
The IR-region annotation we proposed is as below, there is no @llvm.parallel.for.iterator()..... There is no change to loop CFG.
alloc A[100];
%t = call token @llvm.region.entry()["parallel.for"()]
for(i = 0; i < 100; i++) {
a[i] = f(i);
}
@llvm.region.exit(%t)() ["end.parallel.for"()]
Xinmin
-----Original Message-----
From: Johannes Doerfert
2019 Jan 31
6
[RFC] Vector Predication
Hi,
There is now an RFC for a roadmap to native vector predication support
in LLVM and a prototype implementation:
https://reviews.llvm.org/D57504
The prototype demonstrates:
- Predicated vector intrinsics with an explicit mask and vector length
parameter on IR level.
- First-class predicated SDNodes on ISel level. Mask and vector length
are value operands.
- An incremental strategy
2017 Mar 08
2
(no subject)
On 03/08/2017 12:44 PM, Johannes Doerfert wrote:
> I don't know who pointed it out first but Mehdi made me aware of it at
> CGO. I try to explain it shortly.
>
> Given the following situation (in pseudo code):
>
> alloc A[100];
> parallel_for(i = 0; i < 100; i++)
> A[i] = f(i);
>
> acc = 1;
> for(i = 0; i < 100; i++)
> acc = acc *
2016 Apr 12
2
ScalarEvolution "add nsw" question
Hi Johannes,
Sanjoy has given you great information already.
On Sun, Apr 10, 2016 at 5:19 PM, Sanjoy Das <sanjoy at playingwithpointers.com>
wrote:
> Johannes Doerfert wrote:
> > Is there any plan to use e.g., post-dominance information to
> > propagate wrapping flags?
>
> None that I'm aware of.
>
> > If x +nsw y post-dominates the entry block
> >
2017 Mar 08
3
[RFC][PIR] Parallel LLVM IR -- Stage 0 --
I assume the referring case is something like below, right?
#pragma omp parallel num_threads(n)
{
#pragma omp critical
{
x = x + 1;
}
}
If that is the case, the programmer is already writing the code that is not "serial equivalent".
Our representation for parallelizer is
%t = @llvm.region.entry()["omp.parallel"(),