Displaying 2 results from an estimated 2 matches for "s49_d".
2015 Jun 26
2
[LLVMdev] Can LLVM vectorize <2 x i32> type
...mp ne i128 %BCS46_D, 0
br i1 %mskS46_D, label %for.body.preheader, label %return
for.body.preheader: ; preds =
%for.cond.preheader
%S47_D = mul <2 x i32> %splatLDS24_D.splat, %splatLDS7_D.splat
%S48_D = add <2 x i32> %S47_D, <i32 -1, i32 -1>
%S49_D = zext <2 x i32> %S48_D to <2 x i64>
%S50_D = add <2 x i64> %S49_D, <i64 1, i64 1>
%end.idxS51_D = add <2 x i64> %S49_D, <i64 1, i64 1>
%n.vecS52_D = and <2 x i64> %S50_D, <i64 8589934584, i64 8589934584>
%cmp.zeroS53_D = icmp eq <2 x i64&g...
2015 Jun 24
2
[LLVMdev] Can LLVM vectorize <2 x i32> type
Hi,
Is LLVM be able to generate code for the following code?
%mul = mul <2 x i32> %1, %2, where %1 and %2 are <2 x i32> type.
I am running it on a Haswell processor with LLVM-3.4.2. It seems that it
will generates really complicated code with vpaddq, vpmuludq, vpsllq,
vpsrlq.
Thanks,
Zhi
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