search for: rvexisd

Displaying 1 result from an estimated 1 matches for "rvexisd".

2013 Oct 04
1
[LLVMdev] ADDE to use branch registers
...wering:: LowerAddCG(SDValue Op, SelectionDAG &DAG) const { unsigned Opc = Op.getOpcode(); SDNode* N = Op.getNode(); EVT VT = Op.getValueType(); DebugLoc dl = N->getDebugLoc(); SDValue BReg = DAG.getTargetConstant(rvex::B0, VT); // Add extra register to output return DAG.getNode(rvexISD::Addc, dl, VT, N->getOperand(0), N->getOperand(1), BReg); } Could anybody advice me on a way to make the backend know that the ADDE instruction will cause a branch register to be used? Thanks in advance! Maurice Daverveldt TUDelft