Displaying 3 results from an estimated 3 matches for "rv64m".
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rv64g
2019 Jan 30
2
[8.0.0 Release] rc1 has been tagged
...this release?
>
> There are also at least a couple of fairly important patches that it
> would be good to get back-ported into the release branch if possible
>
> r352171 | asb | 2019-01-24 21:11:34 -0800 (Thu, 24 Jan 2019) | 12 lines
> [RISCV] Custom-legalise i32 SDIV/UDIV/UREM on RV64M
>
> r352169 | asb | 2019-01-24 21:04:00 -0800 (Thu, 24 Jan 2019) | 24 lines
> [RISCV] Custom-legalise 32-bit variable shifts on RV64
>
>
> Others that would be good, but perhaps not so important to get in:
>
> r352240 | asb | 2019-01-25 13:06:47 -0800 (Fri, 25 Jan 2019) | 7...
2019 Jan 24
14
[8.0.0 Release] rc1 has been tagged
Dear testers,
8.0.0-rc1 was just tagged (from the branch at r351980).
It took a little longer than planned, but it's looking good.
Please run the test script, share your results, and upload binaries.
I'll get the source tarballs and docs published as soon as possible,
and binaries as they become available.
Thanks,
Hans
2018 Dec 14
2
Dealing with information loss for widened integer operations at ISel time
On Thu, 13 Dec 2018 at 21:41, Friedman, Eli <efriedma at codeaurora.org> wrote:
>
> On 12/13/2018 6:25 AM, Alex Bradbury wrote:
> > There's also likely to be cases where you want to calculate the demanded bits
> > in order to determine if e.g. a W-suffixed instruction can be selected for
> > `(somoeop (zexti32 GPR:$rs1), (zexti32 GPR:$rs2))`. This is easy to match