search for: runtime_data

Displaying 19 results from an estimated 19 matches for "runtime_data".

2020 Sep 07
0
[PATCH v7 41/72] x86/sev-es: Setup per-cpu GHCBs for the runtime handler
...ck.h> +#include <linux/kernel.h> #include <linux/mm.h> #include <asm/sev-es.h> @@ -29,6 +34,13 @@ static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE); */ static struct ghcb __initdata *boot_ghcb; +/* #VC handler runtime per-cpu data */ +struct sev_es_runtime_data { + struct ghcb ghcb_page; +}; + +static DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data); + /* Needed in vc_early_forward_exception */ void do_early_exception(struct pt_regs *regs, int trapnr); @@ -198,6 +210,48 @@ static bool __init sev_es_setup_ghcb(void) return true; } +static...
2020 Apr 28
0
[PATCH v3 43/75] x86/sev-es: Setup per-cpu GHCBs for the runtime handler
...h> +#include <linux/kernel.h> #include <linux/mm.h> #include <asm/trap_defs.h> @@ -29,6 +34,13 @@ static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE); */ static struct ghcb __initdata *boot_ghcb; +/* #VC handler runtime per-cpu data */ +struct sev_es_runtime_data { + struct ghcb ghcb_page; +}; + +static DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data); + /* Needed in vc_early_vc_forward_exception */ void do_early_exception(struct pt_regs *regs, int trapnr); @@ -198,6 +210,48 @@ static bool __init sev_es_setup_ghcb(void) return true; } +sta...
2020 Apr 28
0
[PATCH v3 54/75] x86/sev-es: Handle DR7 read/write events
...c @@ -31,6 +31,8 @@ #include <asm/traps.h> #include <asm/svm.h> +#define DR7_RESET_VALUE 0x400 + /* For early boot hypervisor communication in SEV-ES enabled guests */ static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE); @@ -61,6 +63,13 @@ struct sev_es_runtime_data { */ bool ghcb_active; bool backup_ghcb_active; + + /* + * Cached DR7 value - write it on DR7 writes and return it on reads. + * That value will never make it to the real hardware DR7 as debugging + * is currently unsupported in SEV-ES guests. + */ + unsigned long dr7; }; static DEFI...
2020 Apr 28
0
[PATCH v3 47/75] x86/sev-es: Add Runtime #VC Exception Handler
...lude <asm/insn-eval.h> #include <asm/fpu/internal.h> #include <asm/processor.h> -#include <asm/trap_defs.h> +#include <asm/traps.h> #include <asm/svm.h> /* For early boot hypervisor communication in SEV-ES enabled guests */ @@ -46,10 +47,26 @@ struct sev_es_runtime_data { /* Physical storage for the per-cpu IST stacks of the #VC handler */ struct vmm_exception_stacks vc_stacks __aligned(PAGE_SIZE); + + /* Reserve on page per CPU as backup storage for the unencrypted GHCB */ + struct ghcb backup_ghcb; + + /* + * Mark the per-cpu GHCBs as in-use to detect nes...
2020 May 25
1
[PATCH v3 54/75] x86/sev-es: Handle DR7 read/write events
On Tue, Apr 28, 2020 at 05:17:04PM +0200, Joerg Roedel wrote: > +static enum es_result vc_handle_dr7_write(struct ghcb *ghcb, > + struct es_em_ctxt *ctxt) > +{ > + struct sev_es_runtime_data *data = this_cpu_read(runtime_data); > + long val, *reg = vc_insn_get_rm(ctxt); > + enum es_result ret; > + > + if (!reg) > + return ES_DECODE_FAILED; > + > + val = *reg; > + > + /* Upper 32 bits must be written as zeroes */ > + if (val >> 32) { > + ctxt-&gt...
2020 Aug 24
0
[PATCH v6 45/76] x86/sev-es: Allocate and Map IST stack for #VC handler
...rnel.h> #include <linux/mm.h> +#include <asm/cpu_entry_area.h> #include <asm/sev-es.h> #include <asm/insn-eval.h> #include <asm/fpu/internal.h> @@ -37,10 +38,41 @@ static struct ghcb __initdata *boot_ghcb; /* #VC handler runtime per-cpu data */ struct sev_es_runtime_data { struct ghcb ghcb_page; + + /* Physical storage for the per-cpu IST stack of the #VC handler */ + char ist_stack[EXCEPTION_STKSZ] __aligned(PAGE_SIZE); + + /* + * Physical storage for the per-cpu fall-back stack of the #VC handler. + * The fall-back stack is used when it is not safe to switch...
2020 Apr 28
0
[PATCH v3 44/75] x86/sev-es: Allocate and Map IST stacks for #VC handler
...ux/kernel.h> #include <linux/mm.h> +#include <asm/cpu_entry_area.h> #include <asm/trap_defs.h> #include <asm/sev-es.h> #include <asm/insn-eval.h> @@ -37,6 +38,9 @@ static struct ghcb __initdata *boot_ghcb; /* #VC handler runtime per-cpu data */ struct sev_es_runtime_data { struct ghcb ghcb_page; + + /* Physical storage for the per-cpu IST stacks of the #VC handler */ + struct vmm_exception_stacks vc_stacks __aligned(PAGE_SIZE); }; static DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data); @@ -236,11 +240,46 @@ static void __init sev_es_init_ghcb(int cp...
2020 Apr 28
0
[PATCH v3 75/75] x86/efi: Add GHCB mappings when SEV-ES is active
...ev-es.c b/arch/x86/kernel/sev-es.c index eef6e2196ef4..3b62714723b5 100644 --- a/arch/x86/kernel/sev-es.c +++ b/arch/x86/kernel/sev-es.c @@ -422,6 +422,31 @@ int sev_es_setup_ap_jump_table(struct real_mode_header *rmh) return 0; } +int __init sev_es_efi_map_ghcbs(pgd_t *pgd) +{ + struct sev_es_runtime_data *data; + unsigned long address, pflags; + int cpu; + u64 pfn; + + if (!sev_es_active()) + return 0; + + pflags = _PAGE_NX | _PAGE_RW; + + for_each_possible_cpu(cpu) { + data = per_cpu(runtime_data, cpu); + + address = __pa(&data->ghcb_page); + pfn = address >> PAGE_SHIFT; + + if (...
2020 Sep 07
0
[PATCH v7 71/72] x86/efi: Add GHCB mappings when SEV-ES is active
...s is needed by the OVMF UEFI firmware which will use whatever it finds in + * the GHCB MSR as its GHCB to talk to the hypervisor. So make sure the per-cpu + * runtime GHCBs used by the kernel are also mapped in the EFI page-table. + */ +int __init sev_es_efi_map_ghcbs(pgd_t *pgd) +{ + struct sev_es_runtime_data *data; + unsigned long address, pflags; + int cpu; + u64 pfn; + + if (!sev_es_active()) + return 0; + + pflags = _PAGE_NX | _PAGE_RW; + + for_each_possible_cpu(cpu) { + data = per_cpu(runtime_data, cpu); + + address = __pa(&data->ghcb_page); + pfn = address >> PAGE_SHIFT; + + if (...
2020 Aug 24
0
[PATCH v6 46/76] x86/sev-es: Adjust #VC IST Stack on entering NMI handler
...nmi_cr2) != read_cr2())) write_cr2(this_cpu_read(nmi_cr2)); if (this_cpu_dec_return(nmi_state)) diff --git a/arch/x86/kernel/sev-es.c b/arch/x86/kernel/sev-es.c index 64002d86a237..95831d103418 100644 --- a/arch/x86/kernel/sev-es.c +++ b/arch/x86/kernel/sev-es.c @@ -52,6 +52,9 @@ struct sev_es_runtime_data { static DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data); +DEFINE_STATIC_KEY_FALSE(sev_es_enable_key); +EXPORT_SYMBOL_GPL(sev_es_enable_key); + static void __init sev_es_setup_vc_stacks(int cpu) { struct sev_es_runtime_data *data; @@ -73,6 +76,59 @@ static void __init sev_es_setu...
2020 Jul 24
86
[PATCH v5 00/75] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de> Hi, here is a rebased version of the latest SEV-ES patches. They are now based on latest tip/master instead of upstream Linux and include the necessary changes. Changes to v4 are in particular: - Moved early IDT setup code to idt.c, because the idt_descr and the idt_table are now static - This required to make stack protector work early (or
2020 Sep 09
0
[PATCH v7 71/72] x86/efi: Add GHCB mappings when SEV-ES is active
...if one processor is executing SetVariable(), then no other processor must enter SetVariable(). And so we'll have *at most* one VCPU in QemuFlashPtrWrite(), at any time.) >>> + */ >>> +int __init sev_es_efi_map_ghcbs(pgd_t *pgd) >>> +{ >>> + struct sev_es_runtime_data *data; >>> + unsigned long address, pflags; >>> + int cpu; >>> + u64 pfn; >>> + >>> + if (!sev_es_active()) >>> + return 0; >>> + >>> + pflags = _PAGE_NX | _PAGE_RW; >>> + >>> +...
2020 Aug 24
96
[PATCH v6 00/76] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de> Hi, here is the new version of the SEV-ES client enabling patch-set. It is based on the latest tip/master branch and contains the necessary changes. In particular those ar: - Enabling CR4.FSGSBASE early on supported processors so that early #VC exceptions on APs can be handled. - Add another patch (patch 1) to fix a KVM frame-size build
2020 Sep 07
84
[PATCH v7 00/72] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de> Hi, here is a new version of the SEV-ES Guest Support patches for x86. The previous versions can be found as a linked list starting here: https://lore.kernel.org/lkml/20200824085511.7553-1-joro at 8bytes.org/ I updated the patch-set based on ther review comments I got and the discussions around it. Another important change is that the early IDT
2020 Sep 07
84
[PATCH v7 00/72] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de> Hi, here is a new version of the SEV-ES Guest Support patches for x86. The previous versions can be found as a linked list starting here: https://lore.kernel.org/lkml/20200824085511.7553-1-joro at 8bytes.org/ I updated the patch-set based on ther review comments I got and the discussions around it. Another important change is that the early IDT
2020 Jul 14
92
[PATCH v4 00/75] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de> Hi, here is the fourth version of the SEV-ES Guest Support patches. I addressed the review comments sent to me for the previous version and rebased the code v5.8-rc5. The biggest change in this version is the IST handling code for the #VC handler. I adapted the entry code for the #VC handler to the big pile of entry code changes merged into
2020 Jul 14
92
[PATCH v4 00/75] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de> Hi, here is the fourth version of the SEV-ES Guest Support patches. I addressed the review comments sent to me for the previous version and rebased the code v5.8-rc5. The biggest change in this version is the IST handling code for the #VC handler. I adapted the entry code for the #VC handler to the big pile of entry code changes merged into
2020 Apr 28
116
[PATCH v3 00/75] x86: SEV-ES Guest Support
...hese instructions are used by KASLR and some hypervisors might intercept them. - Re-implemented nested GHCB handling by keeping a backup GHCB around. This supports one level of GHCB nesting, which is sufficient for now. - Moved all SEV-ES related per-cpu data into 'struct sev_es_runtime_data'. This struct is allocated and initialized at boot per cpu. - Correctly set the protocol and ghcb_usage information when talking to the hypervisor. The previous version of the patch-set can be found here: https://lore.kernel.org/lkml/20200319091407.1481-1-joro at 8bytes.org/ Please...
2020 Apr 28
116
[PATCH v3 00/75] x86: SEV-ES Guest Support
...hese instructions are used by KASLR and some hypervisors might intercept them. - Re-implemented nested GHCB handling by keeping a backup GHCB around. This supports one level of GHCB nesting, which is sufficient for now. - Moved all SEV-ES related per-cpu data into 'struct sev_es_runtime_data'. This struct is allocated and initialized at boot per cpu. - Correctly set the protocol and ghcb_usage information when talking to the hypervisor. The previous version of the patch-set can be found here: https://lore.kernel.org/lkml/20200319091407.1481-1-joro at 8bytes.org/ Please...