Displaying 15 results from an estimated 15 matches for "runl".
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2023 Feb 28
1
[PATCH] drm/nouveau/fifo: set nvkm_engn_cgrp_get storage-class-specifier to static
smatch reports
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.c:33:18:
warning: symbol 'nvkm_engn_cgrp_get' was not declared. Should it be static?
nvkm_engn_cgrp_get is only used in runl.c, so it should be static
Signed-off-by: Tom Rix <trix at redhat.com>
---
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.c | 2 +-
1 file changed, 1 inserti...
2020 Oct 30
6
[PATCH 0/5] Improve Robust Channel (RC) recovery for Turing
This is an initial series of patches to improve channel recovery on Turing GPUs
with the goal of improving reliability enough to eventually enable SVM for
Turing. It's likely follow up patches will be required to fully address problems
with less trivial workloads than what I have been able to test thus far.
This series primarily addresses a number of hardware changes to interrupt layout
and
2017 Apr 27
0
[PATCH] drm/nouveau/fifo/gk104-: Silence a locking warning
...>
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
index 3a24788c3185..a7e55c422501 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
@@ -148,7 +148,7 @@ gk104_fifo_runlist_commit(struct gk104_fifo *fifo, int runl)
case NVKM_MEM_TARGET_NCOH: target = 3; break;
default:
WARN_ON(1);
- return;
+ goto unlock;
}
nvkm_wr32(device, 0x002270, (nvkm_memory_addr(mem) >> 12) |
@@ -160,6 +160,7 @@ gk104_fifo_runlist_commit(struct gk104_fifo *fifo, int runl...
2023 Nov 20
1
[PATCH] nouveau/gsp: fix getting max channel id for GSP
...NV_DEVICE_HOST_CHANNELS: *data = fifo->chid ? fifo->chid->nr : 0; return 0;
+ case NV_DEVICE_HOST_CHANNELS:
+ if (fifo->func->chid_total)
+ *data = fifo->func->chid_total(fifo);
+ else
+ *data = fifo->chid ? fifo->chid->nr : 0;
+ return 0;
case NV_DEVICE_HOST_RUNLISTS:
*data = 0;
nvkm_runl_foreach(runl, fifo)
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
index a0f3277605a5..c21e982b03a5 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/...
2023 Jul 14
2
[PATCH] drm/nouveau/fifo:Fix Nineteen occurrences of the gk104.c error: ERROR: : trailing statements should be on next line
...NE_MSVLD:
+ ptr0 = 0x0270;
+ break;
+ case NVKM_ENGINE_VIC:
+ ptr0 = 0x0280; break;
+ case NVKM_ENGINE_MSENC:
+ ptr0 = 0x0290;
+ break;
+ case NVKM_ENGINE_NVDEC:
ptr1 = 0x0270;
ptr0 = 0x0210;
break;
@@ -435,8 +449,12 @@ gk104_runl_commit(struct nvkm_runl *runl, struct
nvkm_memory *memory, u32 start,
int target;
switch (nvkm_memory_target(memory)) {
- case NVKM_MEM_TARGET_VRAM: target = 0; break;
- case NVKM_MEM_TARGET_NCOH: target = 3; break;
+ case NVKM_MEM_TARGET_VRAM:
+ target = 0;
+ b...
2023 Jul 14
1
[PATCH] drm/nouveau/fifo:Fix Nineteen occurrences of the gk104.c error: ERROR: space prohibited before that ':' (ctx:WxW) ERROR: trailing statements should be on next line ERROR: space prohibited before that ':' (ctx:WxW) ERROR: trailing statements should
...NE_MSVLD:
+ ptr0 = 0x0270;
+ break;
+ case NVKM_ENGINE_VIC:
+ ptr0 = 0x0280; break;
+ case NVKM_ENGINE_MSENC:
+ ptr0 = 0x0290;
+ break;
+ case NVKM_ENGINE_NVDEC:
ptr1 = 0x0270;
ptr0 = 0x0210;
break;
@@ -435,8 +449,12 @@ gk104_runl_commit(struct nvkm_runl *runl, struct
nvkm_memory *memory, u32 start,
int target;
switch (nvkm_memory_target(memory)) {
- case NVKM_MEM_TARGET_VRAM: target = 0; break;
- case NVKM_MEM_TARGET_NCOH: target = 3; break;
+ case NVKM_MEM_TARGET_VRAM:
+ target = 0;
+ b...
2023 Jul 24
1
[PATCH] drm/nouveau/fifo:Fix Nineteen occurrences of the gk104.c error: ERROR: space prohibited before that ':' (ctx:WxW) ERROR: trailing statements should be on next line ERROR: space prohibited before that ':' (ctx:WxW) ERROR: trailing statements should
...> + case NVKM_ENGINE_VIC:
> + ptr0 = 0x0280; break;
> + case NVKM_ENGINE_MSENC:
> + ptr0 = 0x0290;
> + break;
> + case NVKM_ENGINE_NVDEC:
> ptr1 = 0x0270;
> ptr0 = 0x0210;
> break;
> @@ -435,8 +449,12 @@ gk104_runl_commit(struct nvkm_runl *runl, struct
> nvkm_memory *memory, u32 start,
> int target;
>
> switch (nvkm_memory_target(memory)) {
> - case NVKM_MEM_TARGET_VRAM: target = 0; break;
> - case NVKM_MEM_TARGET_NCOH: target = 3; break;
> + case NVKM_MEM_TARGET_VR...
2023 Jul 14
1
[PATCH] drm/nouveau/fifo:Fix Nineteen occurrences of the gk104.c error: ERROR: : trailing statements should be on next line
...> + case NVKM_ENGINE_VIC:
> + ptr0 = 0x0280; break;
> + case NVKM_ENGINE_MSENC:
> + ptr0 = 0x0290;
> + break;
> + case NVKM_ENGINE_NVDEC:
> ptr1 = 0x0270;
> ptr0 = 0x0210;
> break;
> @@ -435,8 +449,12 @@ gk104_runl_commit(struct nvkm_runl *runl, struct
> nvkm_memory *memory, u32 start,
> int target;
>
> switch (nvkm_memory_target(memory)) {
> - case NVKM_MEM_TARGET_VRAM: target = 0; break;
> - case NVKM_MEM_TARGET_NCOH: target = 3; break;
> + case NVKM_MEM_TARGET_VR...
2024 Feb 22
1
[PATCH] drm/nouveau: use dedicated wq for fence uevents work
...ueue_work(fctx->wq, &fctx->uevent_work);
return NVIF_EVENT_KEEP;
}
@@ -194,6 +194,7 @@ nouveau_fence_context_new(struct nouveau_channel *chan, struct nouveau_fence_cha
INIT_LIST_HEAD(&fctx->pending);
spin_lock_init(&fctx->lock);
fctx->context = chan->drm->runl[chan->runlist].context_base + chan->chid;
+ fctx->wq = chan->drm->fence_wq;
if (chan == chan->drm->cechan)
strcpy(fctx->name, "copy engine channel");
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.h b/drivers/gpu/drm/nouveau/nouveau_fence.h
index 8bc065a...
2024 Feb 23
1
[PATCH] drm/nouveau: use dedicated wq for fence uevents work
...> > }
> >
> > @@ -194,6 +194,7 @@ nouveau_fence_context_new(struct nouveau_channel *chan, struct nouveau_fence_cha
> > INIT_LIST_HEAD(&fctx->pending);
> > spin_lock_init(&fctx->lock);
> > fctx->context = chan->drm->runl[chan->runlist].context_base + chan->chid;
> > + fctx->wq = chan->drm->fence_wq;
> >
> > if (chan == chan->drm->cechan)
> > strcpy(fctx->name, "copy engine channel");
> > diff --git a/drivers/gpu/drm/nouvea...
2012 Jan 30
7
WoW is not beeing started, wine has problems
Hello everyone.
I've asked for help a few days ago, but now I need help again. [Embarassed]
Here I have another problem.
I want to start World of Warcraft (wow.exe), I have downloaded wine with Yast.
I've installed already a 3D-driver on my graphic-card.
And I have already the "World of Warcraft" file.
So, I want to start in the terminal with the command:
wine "World
2005 Oct 20
1
[Possible BUG] Samba v3.0.20b and permissions POSIX/Samba
hi list,
i experienced a weird behaviour of samba in the latest versions
(3.0.20[a,b]) on XFS:
directory:
/data (owner=iso,group=edv)
permissions: 2770
if i put a file in there with permissions 644 (owner=root,group=edv) i
cannot delete it. windows tells even tells me, that it's readonly (read
only bit set). and that's the only difference: 3.0.14a doesn't show the
file as read
2019 Oct 08
4
[PATCH 1/5] drm/nouveau/gr/gf100-: make undeclared symbols static
The following functions are not declared outside of the
file they are in, so make them static to avoid these
warnings:
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:745:1: warning: symbol 'gf100_gr_fecs_start_ctxsw' was not declared. Should it be static?
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:760:1: warning: symbol 'gf100_gr_fecs_stop_ctxsw' was not declared. Should it be
2019 Nov 08
1
[PATCH] RFC: drm/nouveau: Make BAR1 support optional
...ifo/gk104.c
@@ -906,7 +906,6 @@ gk104_fifo_oneinit(struct nvkm_fifo *base)
struct gk104_fifo *fifo = gk104_fifo(base);
struct nvkm_subdev *subdev = &fifo->base.engine.subdev;
struct nvkm_device *device = subdev->device;
- struct nvkm_vmm *bar = nvkm_bar_bar1_vmm(device);
int engn, runl, pbid, ret, i, j;
enum nvkm_devidx engidx;
u32 *map;
@@ -967,12 +966,19 @@ gk104_fifo_oneinit(struct nvkm_fifo *base)
if (ret)
return ret;
- ret = nvkm_vmm_get(bar, 12, nvkm_memory_size(fifo->user.mem),
- &fifo->user.bar);
- if (ret)
- return ret;
+ if (device->bar) {...
2019 Sep 16
9
[PATCH 0/6] drm/nouveau: Preparatory work for GV11B support
From: Thierry Reding <treding at nvidia.com>
Hi Ben,
these are a couple of patches that are in preparation for adding GV11B
support. The fundamental issue that these are trying to solve is that
the GV11B is the first Tegra incarnation of the GPU where the aperture
really matters. All prior generations would accept any of them.
For dGPUs we usually allocate memory in VRAM, so the default