search for: rt_address_high

Displaying 17 results from an estimated 17 matches for "rt_address_high".

2014 Jan 23
2
[PATCH v2] nv50, nvc0: clear out RT on a null cbuf
...@ -1,6 +1,19 @@ > > #include "nv50/nv50_context.h" > -#include "os/os_time.h" > +#include "nv50/nv50_defs.xml.h" > + > +static INLINE void > +nv50_fb_set_null_rt(struct nouveau_pushbuf *push, unsigned i) > +{ > + BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(i)), 4); > + PUSH_DATA (push, 0); > + PUSH_DATA (push, 0); > + PUSH_DATA (push, NV50_SURFACE_FORMAT_NONE); > + PUSH_DATA (push, 0); > + BEGIN_NV04(push, NV50_3D(RT_HORIZ(i)), 2); > + PUSH_DATA (push, 64); > + PUSH_DATA (push, 0); > +} > > static void &...
2014 Jan 15
3
[PATCH] nv50, nvc0: don't crash on a null cbuf
...struct nouveau_bo *bo; + + /* Do we need to clear the old RT settings? */ + if (!fb->cbufs[i]) + continue; + + sf = nv50_surface(fb->cbufs[i]); + res = nv04_resource(sf->base.texture); + bo = res->bo; BEGIN_NVC0(push, NVC0_3D(RT_ADDRESS_HIGH(i)), 9); PUSH_DATAh(push, res->address + sf->offset); -- 1.8.3.2
2014 Jan 17
0
[PATCH v2] nv50, nvc0: clear out RT on a null cbuf
.../drivers/nouveau/nv50/nv50_state_validate.c @@ -1,6 +1,19 @@ #include "nv50/nv50_context.h" -#include "os/os_time.h" +#include "nv50/nv50_defs.xml.h" + +static INLINE void +nv50_fb_set_null_rt(struct nouveau_pushbuf *push, unsigned i) +{ + BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(i)), 4); + PUSH_DATA (push, 0); + PUSH_DATA (push, 0); + PUSH_DATA (push, NV50_SURFACE_FORMAT_NONE); + PUSH_DATA (push, 0); + BEGIN_NV04(push, NV50_3D(RT_HORIZ(i)), 2); + PUSH_DATA (push, 64); + PUSH_DATA (push, 0); +} static void nv50_validate_fb(struct nv50_context *nv50) @@ -20...
2014 Jan 23
0
[PATCH v2] nv50, nvc0: clear out RT on a null cbuf
...#include "nv50/nv50_context.h" >> -#include "os/os_time.h" >> +#include "nv50/nv50_defs.xml.h" >> + >> +static INLINE void >> +nv50_fb_set_null_rt(struct nouveau_pushbuf *push, unsigned i) >> +{ >> + BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(i)), 4); >> + PUSH_DATA (push, 0); >> + PUSH_DATA (push, 0); >> + PUSH_DATA (push, NV50_SURFACE_FORMAT_NONE); >> + PUSH_DATA (push, 0); >> + BEGIN_NV04(push, NV50_3D(RT_HORIZ(i)), 2); >> + PUSH_DATA (push, 64); >> + PUSH_DATA (push, 0); >&g...
2014 May 27
1
[PATCH V3] nvc0: implement clear_buffer
...color.f[1]); + PUSH_DATAf(push, color.f[2]); + PUSH_DATAf(push, color.f[3]); + BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2); + PUSH_DATA (push, width << 16); + PUSH_DATA (push, height << 16); + + IMMED_NVC0(push, NVC0_3D(RT_CONTROL), 1); + + BEGIN_NVC0(push, NVC0_3D(RT_ADDRESS_HIGH(0)), 9); + PUSH_DATAh(push, buf->address + offset); + PUSH_DATA (push, buf->address + offset); + + PUSH_DATA (push, width * data_size); + PUSH_DATA (push, height); + + PUSH_DATA (push, nvc0_format_table[dst_fmt].rt); + PUSH_DATA (push, 1 << 12); + PUSH_DATA (push, 1); +...
2014 May 26
1
[PATCH V2] nvc0: implement clear_buffer
...PUSH_DATAf(push, color.f[2]); + PUSH_DATAf(push, color.f[3]); + BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2); + PUSH_DATA (push, width << 16); + PUSH_DATA (push, height << 16); + + IMMED_NVC0(push, NVC0_3D(RT_CONTROL), 1); + + BEGIN_NVC0(push, NVC0_3D(RT_ADDRESS_HIGH(0)), 9); + PUSH_DATAh(push, buf->address + offset); + PUSH_DATA (push, buf->address + offset); + + PUSH_DATA (push, width * data_size); + PUSH_DATA (push, height); + + PUSH_DATA (push, nvc0_format_table[dst_fmt].rt); + PUSH_DATA (push, 1 << 12); + PUSH...
2014 May 26
2
Implement buffer_clear for nvc0
Hi, please review the following patch! Thanks, Tobias Klausmann
2014 May 26
0
[PATCH] nvc0: Implement buffer_clear for this type of hardware
...; + PUSH_DATAf(push, color.f[3]); + BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2); + PUSH_DATA (push, width << 16); + PUSH_DATA (push, height << 16); + + BEGIN_NVC0(push, NVC0_3D(RT_CONTROL), 1); + PUSH_DATA (push, 1); + + BEGIN_NVC0(push, NVC0_3D(RT_ADDRESS_HIGH(0)), 9); + PUSH_DATAh(push, buf->address + offset); + PUSH_DATA (push, buf->address + offset); + + PUSH_DATA (push, width * data_size); + PUSH_DATA (push, height); + + PUSH_DATA (push, nvc0_format_table[dst_fmt].rt); + PUSH_DATA (push, 1 << 12); + PUSH...
2014 May 21
2
[Mesa-dev] [PATCH 02/12] nv50: setup scissors on clear_render_target/depth_stencil
...BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2); > + PUSH_DATA (push, 8192 << 16); > + PUSH_DATA (push, 8192 << 16); > + nv50->scissors_dirty |= 1; > + > BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1); > PUSH_DATA (push, 1); > BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(0)), 5); > @@ -325,7 +333,7 @@ nv50_clear_render_target(struct pipe_context *pipe, > (z << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT)); > } > > - nv50->dirty |= NV50_NEW_FRAMEBUFFER; > + nv50->dirty |= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR; >...
2014 Sep 01
2
[PATCH 1/3] nv50: set the miptree address when clearing bo's in vp2 init
The mt address is about to be used more, make sure it's set appropriately. Reported-by: Emil Velikov <emil.l.velikov at gmail.com> Tested-by: Emil Velikov <emil.l.velikov at gmail.com> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Cc: "10.2 10.3" <mesa-stable at lists.freedesktop.org> --- src/gallium/drivers/nouveau/nv50/nv84_video.c | 2 ++ 1 file
2018 Feb 04
0
[PATCH 2/2] nv50/xv: add support for depth 30 xv output
...mats; adapt->nPorts = NUM_TEXTURE_PORTS; adapt->pPortPrivates = (DevUnion*)(&adapt[1]); diff --git a/src/nv50_xv.c b/src/nv50_xv.c index b2541b9..ba01c99 100644 --- a/src/nv50_xv.c +++ b/src/nv50_xv.c @@ -91,8 +91,9 @@ nv50_xv_image_put(ScrnInfoPtr pScrn, BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(0)), 5); PUSH_DATA (push, dst->offset >> 32); PUSH_DATA (push, dst->offset); - switch (ppix->drawable.bitsPerPixel) { + switch (ppix->drawable.depth) { case 32: PUSH_DATA (push, NV50_SURFACE_FORMAT_BGRA8_UNORM); break; + case 30: PUSH_DATA (push, NV50_SURFACE_FORMAT_RGB10_A2...
2014 May 20
0
[PATCH 02/12] nv50: setup scissors on clear_render_target/depth_stencil
..., (height << 16) | dsty); + BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2); + PUSH_DATA (push, 8192 << 16); + PUSH_DATA (push, 8192 << 16); + nv50->scissors_dirty |= 1; + BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1); PUSH_DATA (push, 1); BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(0)), 5); @@ -325,7 +333,7 @@ nv50_clear_render_target(struct pipe_context *pipe, (z << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT)); } - nv50->dirty |= NV50_NEW_FRAMEBUFFER; + nv50->dirty |= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR; } static void @@ -364,6 +372,14...
2014 May 21
0
[Mesa-dev] [PATCH 02/12] nv50: setup scissors on clear_render_target/depth_stencil
...ISSOR_HORIZ(0)), 2); >> + PUSH_DATA (push, 8192 << 16); >> + PUSH_DATA (push, 8192 << 16); >> + nv50->scissors_dirty |= 1; >> + >> BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1); >> PUSH_DATA (push, 1); >> BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(0)), 5); >> @@ -325,7 +333,7 @@ nv50_clear_render_target(struct pipe_context *pipe, >> (z << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT)); >> } >> >> - nv50->dirty |= NV50_NEW_FRAMEBUFFER; >> + nv50->dirty |= NV50_NEW_FRAMEBUFFER | N...
2018 Feb 04
1
[PATCH 1/2] dri3: remove bogus condition for creating pixmap
Not clear what the depth % 8 was trying to protect against, but it was breaking 30bpp visuals with DRI3. Add it in to ensure that bitsPerPixel % 8 is 0, since there is plenty of bpp/8 math in the driver. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/nouveau_dri2.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/nouveau_dri2.c b/src/nouveau_dri2.c
2014 May 20
14
[PATCH 00/12] Cherry-pick nv50/nvc0 patches from gallium-nine
I went through the gallium-nine tree and picked out nouveau patches that are general bug-fixes. The first bunch I'd like to also get into 10.2. I've reviewed all of them and they make sense to me, but sending them out for public review as well in case there are any objections. Unless I hear objections, I'd like to push this by Friday. Christoph Bumiller (11): nv50,nvc0: always pull
2015 Oct 16
37
[Bug 92504] New: [NVA5] Corruption in Plasma 5 on resume after changing screen configuration
https://bugs.freedesktop.org/show_bug.cgi?id=92504 Bug ID: 92504 Summary: [NVA5] Corruption in Plasma 5 on resume after changing screen configuration Product: Mesa Version: git Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium
2014 Dec 31
2
[PATCH 1/2] nv50: regenerate rnndb headers
...ivers/nouveau/nv50/nv50_state_validate.c index 6916bea..85e19b4 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c @@ -8,7 +8,7 @@ nv50_fb_set_null_rt(struct nouveau_pushbuf *push, unsigned i) BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(i)), 4); PUSH_DATA (push, 0); PUSH_DATA (push, 0); - PUSH_DATA (push, NV50_SURFACE_FORMAT_NONE); + PUSH_DATA (push, 0); PUSH_DATA (push, 0); BEGIN_NV04(push, NV50_3D(RT_HORIZ(i)), 2); PUSH_DATA (push, 64); diff --git a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/ga...