search for: rsvd_head

...644 --- a/drivers/gpu/drm/nouveau/core/subdev/fb/ramnvc0.c +++ b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnvc0.c @@ -119,7 +119,6 @@ nvc0_ram_create(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_bios *bios = nouveau_bios(pfb); struct nouveau_ram *ram; const u32 rsvd_head = ( 256 * 1024) >> 12; /* vga memory */ - const u32 rsvd_tail = (1024 * 1024) >> 12; /* vbios etc */ u32 parts = nv_rd32(pfb, 0x022438); u32 pmask = nv_rd32(pfb, 0x022554); u32 bsize = nv_rd32(pfb, 0x10f20c); @@ -156,7 +155,7 @@ nvc0_ram_create(struct nouveau_object *parent, struc...

On Wed, Dec 10, 2014 at 5:53 PM, Pierre Moreau <pierre.morrow at free.fr> wrote: > (This is a v3 of patch "drm/nouveau/fb/nv50: Add PFB writes") > > This fix a GPU lockup on 9400M (NVAC) when using acceleration, see > https://bugs.freedesktop.org/show_bug.cgi?id=27501 > > v2: > - Move code to subdev/fb/nv50.c as suggested by Roy Spliet; > - Remove arbitrary

...M is reported, something went very wrong, bail */ + if (ram->size > (1ULL << 40)) { + nv_error(pfb, "invalid vram size: %llx\n", ram->size); + return -EINVAL; + } + /* if all controllers have the same amount attached, there's no holes */ if (uniform) { offset = rsvd_head; -- 2.3.6

..., &r); if (ret) { mutex_unlock(&mm->mutex); nv50_vram_del(dev, &mem); @@ -187,9 +191,9 @@ nv50_vram_init(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_vram_engine *vram = &dev_priv->engine.vram; - const u32 rsvd_head = ( 256 * 1024) >> 12; /* vga memory */ const u32 rsvd_tail = (1024 * 1024) >> 12; /* vbios etc */ u32 pfb714 = nv_rd32(dev, 0x100714); + u32 rsvd_head; u32 rblock, length; switch (pfb714 & 0x00000007) { @@ -207,6 +211,11 @@ nv50_vram_init(struct drm_device *dev) break;...

...func *func, struct nvkm_fb *fb, 573 struct nvkm_ram *ram) 574 { 575 struct nvkm_subdev *subdev = &fb->subdev; 576 struct nvkm_device *device = subdev->device; 577 struct nvkm_bios *bios = device->bios; 578 const u32 rsvd_head = ( 256 * 1024); /* vga memory */ 579 const u32 rsvd_tail = (1024 * 1024); /* vbios etc */ 580 enum nvkm_ram_type type = nvkm_fb_bios_memtype(bios); 581 u32 fbps = nvkm_rd32(device, 0x022438); 582 u64 total = 0, lcomm = ~0, lower, ubase, usize;...

Here's a quick-but-I-guess-tidy-fix for faulty behaviour someone reported in NVAF. I'm just not sure if the check for nvaa/nvac should still be in nv50_pm_clocks_pre... I believe this is wrong as they can reclock perfectly well (except the non-existing memory). Anyone has a definite answer to that?