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2012 Sep 14
0
[LLVMdev] Seperating registers in target description string replacement without adding whitespace?
...$rd, (OpNode RC:$rs, RC:$rt))], itin> { let shamt = 0; let isCommutable = isComm; let isReMaterializable = 1; } This works, but I have to have the whitespace after $rs (which isn't supported). If I get rid of the space, I get a message like "ArithLogicR doesn't have operand $rsAND" or something similar. The point is that it doesn't recognise $rs as a seperate entity. Is there an encoding that it supports seperating the registers from the operation without adding extra whitespace? -------------- next part -------------- An HTML attachment was scrubbed... URL: <h...