search for: rri_alt

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2014 Dec 26
2
[LLVMdev] X86 disassembler & assembler mismatch
...C:$dst, (Int RC:$src1, (memop addr:$src2), imm:$cc))], > itins.rm, d>, > Sched<[WriteFAddLd, ReadAfterLd]>; > > // Accept explicit immediate argument form instead of comparison code. > let isAsmParserOnly = 1, hasSideEffects = 0 in { > def rri_alt : PIi8<0xC2, MRMSrcReg, > (outs RC:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc), > asm_alt, [], itins.rr, d>, Sched<[WriteFAdd]>; > def rmi_alt : PIi8<0xC2, MRMSrcMem, > (outs RC:$dst), (ins RC:$src1, x86memop:$src2, i8imm:$c...
2014 Dec 26
2
[LLVMdev] X86 disassembler & assembler mismatch
hi, some instructions mismatch between assembler & disassembler, like below. it seems this happens with all SSECC related instructions? thanks, Jun $ echo "cmpps xmm1, xmm2, 23" | ./Release+Asserts/bin/llvm-mc -assemble -triple=x86_64 --output-asm-variant=1 -x86-asm-syntax=intel -show-encoding .text cmpps xmm1, xmm2, 23 # encoding: [0x0f,0xc2,0xca,0x17] $