Displaying 3 results from an estimated 3 matches for "rop_and".
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op_and
2009 Oct 22
1
[PATCH] nv04-nv40/exa: Reorder the commands in PrepareCopy to match the blob.
...map, int dx, int dy,
return FALSE;
planemask |= ~0 << pDstPixmap->drawable.bitsPerPixel;
- if (planemask != ~0 || alu != GXcopy) {
- if (pDstPixmap->drawable.bitsPerPixel == 32)
- return FALSE;
- BEGIN_RING(chan, blit, NV04_IMAGE_BLIT_OPERATION, 1);
- OUT_RING (chan, 1); /* ROP_AND */
- NV04EXASetROP(pScrn, alu, planemask);
- } else {
- BEGIN_RING(chan, blit, NV04_IMAGE_BLIT_OPERATION, 1);
- OUT_RING (chan, 3); /* SRCCOPY */
- }
+ if ((planemask != ~0 || alu != GXcopy)
+ && pDstPixmap->drawable.bitsPerPixel == 32)
+ return FALSE;
if (!NVAccelGetCtxSurf...
2010 Apr 11
1
[PATCH 2/2] drm/nv04: Implement missing nv04 PGRAPH methods in software.
...bits when you poke the relevant
+ * object-binding methods with object of the proper type, or with the NULL
+ * type. It'll only allow rendering using the grobj if all needed objects
+ * are bound. The needed set of objects depends on selected operation: for
+ * example rop object is needed by ROP_AND, but not by SRCCOPY_AND.
+ *
+ * NV04 doesn't have these methods implemented at all, and doesn't have the
+ * relevant bits in grobj. Instead, it'll allow rendering whenever bit 24
+ * is set. So we have to emulate them in software, internally keeping the
+ * same bits as NV05 does. Sin...
2010 Apr 11
1
[PATCH 1/2] drm/nouveau: Use 0x5f instead of 0x9f as imageblit on original NV10.
Signed-off-by: Marcin Ko?cielnicki <koriakin at 0x04.net>
---
drivers/gpu/drm/nouveau/nv04_fbcon.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nv04_fbcon.c b/drivers/gpu/drm/nouveau/nv04_fbcon.c
index 813b25c..7cf9287 100644
--- a/drivers/gpu/drm/nouveau/nv04_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv04_fbcon.c
@@ -236,7 +236,7 @@