search for: romixlev

On Thu, Mar 22, 2018 at 4:51 PM, Adrian Prantl <aprantl at apple.com> wrote: > > >> On Mar 22, 2018, at 4:47 PM, Roman Levenstein <romixlev at gmail.com> wrote: >> >> Adrian, >> >> Thanks for a quick reply! >> >> On Thu, Mar 22, 2018 at 4:22 PM, Adrian Prantl <aprantl at apple.com> wrote: >>> >>> >>>> On Mar 22, 2018, at 4:08 PM, Roman Levenstein <romixlev at...

On Thu, Mar 22, 2018 at 5:13 PM, Roman Levenstein via llvm-dev <llvm-dev at lists.llvm.org> wrote: > On Thu, Mar 22, 2018 at 4:51 PM, Adrian Prantl <aprantl at apple.com> wrote: >> >> >>> On Mar 22, 2018, at 4:47 PM, Roman Levenstein <romixlev at gmail.com> wrote: >>> >>> Adrian, >>> >>> Thanks for a quick reply! >>> >>> On Thu, Mar 22, 2018 at 4:22 PM, Adrian Prantl <aprantl at apple.com> wrote: >>>> >>>> >>>>> On Mar 22, 2018, at 4:08...

> On Mar 22, 2018, at 4:47 PM, Roman Levenstein <romixlev at gmail.com> wrote: > > Adrian, > > Thanks for a quick reply! > > On Thu, Mar 22, 2018 at 4:22 PM, Adrian Prantl <aprantl at apple.com> wrote: >> >> >>> On Mar 22, 2018, at 4:08 PM, Roman Levenstein <romixlev at gmail.com> wrote: >>&...

Adrian, Thanks for a quick reply! On Thu, Mar 22, 2018 at 4:22 PM, Adrian Prantl <aprantl at apple.com> wrote: > > >> On Mar 22, 2018, at 4:08 PM, Roman Levenstein <romixlev at gmail.com> wrote: >> >> Hi, >> >> I'm trying to achieve the following: >> >> - I have a global variable BaseAddress that holds the base address of >> a contiguous dynamically allocated memory block. >> >> - I have a number of logical v...

...olving.pdf I think I've seen a few more papers on this topic, but cannot remember them at the moment. If I find more papers in my collection I'll let you know. /Roman >________________________________ >Von: Jakob Stoklund Olesen <stoklund at 2pi.dk> >An: Leo Romanoff <romixlev at yahoo.com> >Cc: "llvmdev at cs.uiuc.edu List" <llvmdev at cs.uiuc.edu> >Gesendet: 16:18 Dienstag, 27.September 2011 >Betreff: Re: [LLVMdev] Greedy Register Allocation in LLVM 3.0 > > > > >On Sep 27, 2011, at 12:11 AM, Leo Romanoff wrote: > >Quite...

On Sep 27, 2011, at 12:11 AM, Leo Romanoff wrote: > Quite some of these register allocation proposals are also able to handle overlapping register classes. That's interesting. Do you have any references? /jakob -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110927/e4b1f13d/attachment.html>

...veIntervals::findLiveinMBBs (from a checking std:: VS2005 implementation). Idx2MBBMap has two elements in it, both of which have a .first of 0. (I believe because of an empty MBB in the function below, so StartIndex doesn't advance). scott On Wed, Apr 16, 2008 at 2:52 AM, Roman Levenstein <romixlev at yahoo.com> wrote: > Hi, > > In the LiveIntervalAnalysis::runOnMachineFunction, there is a code to > compute the MBB2IdxMap, by remembering for each MBB its start and end > instruction numbers: > > unsigned MIIndex = 0; > for (MachineFunction::iterator MBB = mf_-...

...king > std:: VS2005 implementation). Idx2MBBMap has two elements in it, both > of which have a .first of 0. (I believe because of an empty MBB in the > function below, so StartIndex doesn't advance). > > scott > > On Wed, Apr 16, 2008 at 2:52 AM, Roman Levenstein > <romixlev at yahoo.com> wrote: >> Hi, >> >> In the LiveIntervalAnalysis::runOnMachineFunction, there is a code to >> compute the MBB2IdxMap, by remembering for each MBB its start and end >> instruction numbers: >> >> unsigned MIIndex = 0; >> for (MachineFu...

Hi, In the LiveIntervalAnalysis::runOnMachineFunction, there is a code to compute the MBB2IdxMap, by remembering for each MBB its start and end instruction numbers: unsigned MIIndex = 0; for (MachineFunction::iterator MBB = mf_->begin(), E = mf_->end(); MBB != E; ++MBB) { unsigned StartIdx = MIIndex; for (MachineBasicBlock::iterator I = MBB->begin(), E =

> On Mar 22, 2018, at 4:08 PM, Roman Levenstein <romixlev at gmail.com> wrote: > > Hi, > > I'm trying to achieve the following: > > - I have a global variable BaseAddress that holds the base address of > a contiguous dynamically allocated memory block. > > - I have a number of logical variables of different types that...

...s that (b) and (c) are very easy to implement, but (a) and (d) could be more chellenging. Evan, I guess you are the most qualified person to judge about this, since you implemented the new soft-float support. What do you think about these extension proposals? -Roman --- Roman Levenstein <romixlev at gmail.com> wrote: > > Date: Tue, 19 Dec 2006 22:13:08 +0100 > From: Roman Levenstein <romixlev at yahoo.com> > To: Chris Lattner <sabre at nondot.org> > Subject: Re: Soft-float > > Hi Chris, > > > BTW, in mainline CVS, the LLVM legalizer now support...

Hi, I'm trying to achieve the following: - I have a global variable BaseAddress that holds the base address of a contiguous dynamically allocated memory block. - I have a number of logical variables of different types that are mapped on certain address ranges inside the memory block pointed to by BaseAddress. The offset and the size of each such logical variable inside the memory block are

On 10/3/06, Roman Levenstein <romixlev at yahoo.com> wrote: > Hi, > > Few more questions that I found while trying to develop a new backend. > And sorry if I ask too many questions. I only have answers to some of them: > 1) My target (embedded processor, which is a "not so direct" successor > of Z80 fami...

Hi, I just updated my LLVM sources from CVS/HEAD and rebuilt them. And I downloaded the GCC4 frontend from the 1.9 release. Now I cannot compile anything, since GCC frontend seems to produce BC files that cannot be read by llvm-dis, llc and other utils. llvm-dis shows a following message: Bytecode formats < 7 are not longer supported. Use llvm-upgrade. (Vers=6, Pos=9) But since the new

Hi, The libFirm library ( http://www.info.uni-karlsruhe.de/software/libfirm/index.php?title=Main_Page ) is GPLed some time ago. libFirm is a library that provides an intermediate representation and optimizations for compilers. Programs are represented in a graph based SSA form. Several targets are supported, especially the x86. Many optimizations are very similar to those of LLVM. But there are

...message. > Checked by AVG Free Edition. > Version: 7.5.516 / Virus Database: 269.20.6/1280 - Release Date: 2/15/2008 > 9:00 AM > > > > > > ------------------------------ > > Message: 7 > Date: Fri, 15 Feb 2008 21:01:33 +0100 (CET) > From: Roman Levenstein <romixlev at yahoo.com> > Subject: [LLVMdev] LiveInterval spilling (was LiveInterval Splitting & > SubRegisters) > To: LLVM Developers Mailing List <llvmdev at cs.uiuc.edu> > Message-ID: <572290.31048.qm at web56312.mail.re3.yahoo.com> > Content-Type: text/plain; char...

...negative way. I do ask these questions, because I do not have a clear understanding of TokenFactors, how they are processed and how they affect the scheduling and code generation. Therefore any help is highly appreciated. Thanks, Roman ----- Ursprüngliche Mail ---- Von: Roman Levenstein <romixlev at yahoo.com> An: LLVM Developers Mailing List <llvmdev at cs.uiuc.edu> Gesendet: Donnerstag, den 24. April 2008, 08:33:25 Uhr Betreff: Re: [LLVMdev] FoldingSetNodeID operations inefficiency Hi Chris, This is a good idea and I started thinking in that direction already. But what I don...

Hi, Few more questions that I found while trying to develop a new backend. And sorry if I ask too many questions. 1) My target (embedded processor, which is a "not so direct" successor of Z80 family of processors) does not support SELECT, so I was looking for a workaround. First I was thinking about expanding it into conditional flow with branching, but then I have found that there

Hi, There is a discussion thread on llvm-commits list about a possibility of using custom memory allocators for STL to improve the performance and reduce the memory pressure of STL containers, e.g. std::set. I thought that this discussion may be interesting for a wider audience and therefore I re-post the messages on llvm-dev as well. It would be interesting to hear what others think about -

...5.516 / Virus Database: 269.20.6/1280 - Release Date: > 2/15/2008 > > 9:00 AM > > > > > > > > > > > > ------------------------------ > > > > Message: 7 > > Date: Fri, 15 Feb 2008 21:01:33 +0100 (CET) > > From: Roman Levenstein <romixlev at yahoo.com> > > Subject: [LLVMdev] LiveInterval spilling (was LiveInterval Splitting & > > SubRegisters) > > To: LLVM Developers Mailing List <llvmdev at cs.uiuc.edu> > > Message-ID: <572290.31048.qm at web56312.mail.re3.yahoo.com> > > Conte...