Displaying 1 result from an estimated 1 matches for "rol64mcl".
2013 Aug 16
1
[LLVMdev] Bug in Intel asm syntax for MC
in LLVM 3.3, file lib/Target/X86/X86GenAsmWriter1.inc is generated for
Intel asm syntax. However, there are some lines like below:
....
case 16:
// ROL64mCL
O << ", %cl";
return;
break;
....
this is wrong, since "%cl" is not Intel syntax.
hopefully somebody will fix this.
thanks.
Jun
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