search for: rnat

Displaying 20 results from an estimated 48 matches for "rnat".

Did you mean: nat
2006 Jun 26
0
[klibc 25/43] ia64 support for klibc
...e 100644 index 0000000..ab1cea2 --- /dev/null +++ b/usr/klibc/arch/ia64/setjmp.S @@ -0,0 +1,343 @@ +/* + * IA-64 specific setjmp/longjmp routines + * + * Inspired by setjmp.s from the FreeBSD kernel. + */ + +#define J_UNAT 0 +#define J_NATS 0x8 +#define J_PFS 0x10 +#define J_BSP 0x18 +#define J_RNAT 0x20 +#define J_PREDS 0x28 +#define J_LC 0x30 +#define J_R4 0x38 +#define J_R5 0x40 +#define J_R6 0x48 +#define J_R7 0x50 +#define J_SP 0x58 +#define J_F2 0x60 +#define J_F3 0x70 +#define J_F4 0x80 +#define J_F5 0x90 +#define J_F16 0xa0 +#define J_F17 0xb0 +#define J_F18 0xc0 +#defin...
2008 Mar 31
1
[05/17][PATCH] kvm/ia64 : Add head files for kvm/ia64
...and use those macros. > +#define ia64_get_bspstore() > \ > +({ > \ > + unsigned long val; > \ > + asm volatile ("mov %0=ar.bspstore;;" : "=r"(val) :: "memory"); > \ > + val; > \ > +}) Ditto for for AR.BSPSTORE > +#define ia64_get_rnat() > \ > +({ > \ > + unsigned long val; > \ > + asm volatile ("mov %0=ar.rnat;" : "=r"(val) :: "memory"); > \ > + val; > \ > +}) Ditto for AR.RNAT > +static inline unsigned long ia64_get_itc(void) > +{ > + unsigned long result; &...
2008 Mar 31
1
[05/17][PATCH] kvm/ia64 : Add head files for kvm/ia64
...and use those macros. > +#define ia64_get_bspstore() > \ > +({ > \ > + unsigned long val; > \ > + asm volatile ("mov %0=ar.bspstore;;" : "=r"(val) :: "memory"); > \ > + val; > \ > +}) Ditto for for AR.BSPSTORE > +#define ia64_get_rnat() > \ > +({ > \ > + unsigned long val; > \ > + asm volatile ("mov %0=ar.rnat;" : "=r"(val) :: "memory"); > \ > + val; > \ > +}) Ditto for AR.RNAT > +static inline unsigned long ia64_get_itc(void) > +{ > + unsigned long result; &...
2008 Feb 26
8
[PATCH 0/8] RFC: ia64/xen TAKE 2: paravirtualization of hand written assembly code
Hi. I rewrote the patch according to the comments. I adopted generating in-place code because it looks the quickest way. The point Eddie wanted to discuss is how to generate code and its ABI. i.e. in-place generating v.s. direct jump v.s. indirect function call Indirect function call doesn't make sense because ivt.S is compiled multi times. And it is up to pv instances to choose in-place
2008 Feb 26
8
[PATCH 0/8] RFC: ia64/xen TAKE 2: paravirtualization of hand written assembly code
Hi. I rewrote the patch according to the comments. I adopted generating in-place code because it looks the quickest way. The point Eddie wanted to discuss is how to generate code and its ABI. i.e. in-place generating v.s. direct jump v.s. indirect function call Indirect function call doesn't make sense because ivt.S is compiled multi times. And it is up to pv instances to choose in-place
2008 Feb 25
6
[PATCH 0/4] ia64/xen: paravirtualization of hand written assembly code
Hi. The patch I send before was too large so that it was dropped from the maling list. I'm sending again with smaller size. This patch set is the xen paravirtualization of hand written assenbly code. And I expect that much clean up is necessary before merge. We really need the feed back before starting actual clean up as Eddie already said before. Eddie discussed how to clean up and suggested
2008 Feb 25
6
[PATCH 0/4] ia64/xen: paravirtualization of hand written assembly code
Hi. The patch I send before was too large so that it was dropped from the maling list. I'm sending again with smaller size. This patch set is the xen paravirtualization of hand written assenbly code. And I expect that much clean up is necessary before merge. We really need the feed back before starting actual clean up as Eddie already said before. Eddie discussed how to clean up and suggested
2008 Dec 12
5
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization TAKE 2
This patch set is intended for the next merge window. They are just enhancements of the already merged patches or ia64 porting from x86 paravirt techniques and that their quality is enough for merge. This patch set is for binary patch optimization for paravirt_ops. The binary patch optimization is important on native case because the paravirt_ops overhead can be reduced by converting indirect
2008 Dec 12
5
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization TAKE 2
This patch set is intended for the next merge window. They are just enhancements of the already merged patches or ia64 porting from x86 paravirt techniques and that their quality is enough for merge. This patch set is for binary patch optimization for paravirt_ops. The binary patch optimization is important on native case because the paravirt_ops overhead can be reduced by converting indirect
2008 Dec 22
5
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization TAKE 3
This patch set is intended for the next merge window. They are just enhancements of the already merged patches or ia64 porting from x86 paravirt techniques and that their quality is enough for merge. This patch set is for binary patch optimization for paravirt_ops which depends on the patch series I sent out, ia64/pv_ops, xen: more paravirtualization. The binary patch optimization is important on
2008 Dec 22
5
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization TAKE 3
This patch set is intended for the next merge window. They are just enhancements of the already merged patches or ia64 porting from x86 paravirt techniques and that their quality is enough for merge. This patch set is for binary patch optimization for paravirt_ops which depends on the patch series I sent out, ia64/pv_ops, xen: more paravirtualization. The binary patch optimization is important on
2009 Mar 04
5
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization TAKE 4
This patch set is for the next merge window. They are just enhancements of the already merged patches or ia64 porting from x86 paravirt techniques and that their quality is enough for merge. This patch set is for binary patch optimization for paravirt_ops which depends on the patch series I sent out, ia64/pv_ops, xen: more paravirtualization. The binary patch optimization is important on native
2009 Mar 04
5
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization TAKE 4
This patch set is for the next merge window. They are just enhancements of the already merged patches or ia64 porting from x86 paravirt techniques and that their quality is enough for merge. This patch set is for binary patch optimization for paravirt_ops which depends on the patch series I sent out, ia64/pv_ops, xen: more paravirtualization. The binary patch optimization is important on native
2006 Jun 20
1
Re: [Xen-ia64-devel] Weekly benchmark results [ww24]
...7 >(XEN) vcpu 0xf0000000041c0000 vcpu 0 >(XEN) >(XEN) CPU 1 >(XEN) psr : 0000101008222018 ifs : 8000000000000a98 ip : >[<f0000000040375a0>] >(XEN) ip is at csched_schedule+0x970/0xf70 >(XEN) unat: 0000000000000000 pfs : 0000000000000a98 rsc : 0000000000000003 >(XEN) rnat: 0000121008226018 bsps: f00000000405a6c0 pr : 000000000001aaa9 >(XEN) ldrs: 0000000000000000 ccv : 0000000000000000 fpsr: 0009804c8a70033f >(XEN) csd : 0000000000000000 ssd : 0000000000000000 >(XEN) b0 : f0000000040375a0 b6 : f000000004049c80 b7 : e000000000100800 >(XEN) f6 : 0fffb...
2008 Nov 25
6
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization
This patch set is for binary patch optimization for paravirt_ops. The binary patch optimization is important on native case because the paravirt_ops overhead can be reduced by converting indirect call into in-place execution or direct call. The first patch imports helper functions which themselves doesn't interesting things. The second patch replaces the indirect function calls with a
2008 Nov 25
6
[PATCH 0/5] ia64/pv_ops, xen: binary patch optimization
This patch set is for binary patch optimization for paravirt_ops. The binary patch optimization is important on native case because the paravirt_ops overhead can be reduced by converting indirect call into in-place execution or direct call. The first patch imports helper functions which themselves doesn't interesting things. The second patch replaces the indirect function calls with a
2007 Aug 30
4
free_irq_vector on ia64
Hi Alex: I was looking at an ia64 bug report and noticed that we don''t actually free IRQs in the free_irq_vector hypercall. This would eventually lead to alloc_irq_vector failing. Unless I''m mistaken something like calling pci_disable_device and pci_enable_device can lead to this situation. So I''m wondering what the original problem was and how could we resolve it
2008 Jun 10
0
[PATCH] xen-netfront: fix xennet_release_tx_bufs().
...-1 [1] Modules linked in: Pid: 14, CPU 0, comm: xenwatch psr : 0000101008422010 ifs : 8000000000000307 ip : [<a0000001004c2ca0>] Not tainted (2.6.26-rc4xen-ia64-dirty) ip is at dev_kfree_skb_irq+0x20/0x1a0 unat: 0000000000000000 pfs : 400000000000040b rsc : 0000000000000007 rnat: 0000000000000000 bsps: 0000000000000000 pr : 000000000000a941 ldrs: 0000000000000000 ccv : 0000000000000000 fpsr: 0009804c8a70433f csd : 0000000000000000 ssd : 0000000000000000 b0 : a0000001003efb70 b6 : a000000100070e40 b7 : a000000100070e40 f6 : 1003e000000fcb75352b1 f7 : 1003e000000000014...
2008 Jun 10
0
[PATCH] xen-netfront: fix xennet_release_tx_bufs().
...-1 [1] Modules linked in: Pid: 14, CPU 0, comm: xenwatch psr : 0000101008422010 ifs : 8000000000000307 ip : [<a0000001004c2ca0>] Not tainted (2.6.26-rc4xen-ia64-dirty) ip is at dev_kfree_skb_irq+0x20/0x1a0 unat: 0000000000000000 pfs : 400000000000040b rsc : 0000000000000007 rnat: 0000000000000000 bsps: 0000000000000000 pr : 000000000000a941 ldrs: 0000000000000000 ccv : 0000000000000000 fpsr: 0009804c8a70433f csd : 0000000000000000 ssd : 0000000000000000 b0 : a0000001003efb70 b6 : a000000100070e40 b7 : a000000100070e40 f6 : 1003e000000fcb75352b1 f7 : 1003e000000000014...
2008 Jun 10
0
[PATCH] xen-netfront: fix xennet_release_tx_bufs().
...-1 [1] Modules linked in: Pid: 14, CPU 0, comm: xenwatch psr : 0000101008422010 ifs : 8000000000000307 ip : [<a0000001004c2ca0>] Not tainted (2.6.26-rc4xen-ia64-dirty) ip is at dev_kfree_skb_irq+0x20/0x1a0 unat: 0000000000000000 pfs : 400000000000040b rsc : 0000000000000007 rnat: 0000000000000000 bsps: 0000000000000000 pr : 000000000000a941 ldrs: 0000000000000000 ccv : 0000000000000000 fpsr: 0009804c8a70433f csd : 0000000000000000 ssd : 0000000000000000 b0 : a0000001003efb70 b6 : a000000100070e40 b7 : a000000100070e40 f6 : 1003e000000fcb75352b1 f7 : 1003e000000000014...