Displaying 2 results from an estimated 2 matches for "risv".
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riov
2019 Feb 01
2
[RFC] Vector Predication
On Thu, Jan 31, 2019 at 4:05 PM Philip Reames via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> Do such architectures frequently have arithmetic operations on the mask registers? (i.e. can I reasonable compute a conservative length given a mask register value) If I can, then having a mask as the canonical form and re-deriving the length register from a mask for a sequence of
2019 Feb 05
4
[RFC] Vector Predication
...d to be monotonic).
>>
>> VL can also be dynamically shortened in the middle of a loop iteration
>> by an unaligned vector load that crosses a protection boundary if the
>> later elements are inaccessible.
> I can't reconcile this complexity with either the snippet on RISV
> which was shared, or the current EVL proposal. Doesn't this imply
> that the vector length can change between *every* pair of vector
> instructions? If so, how does having it as part of the EVL intrinsics
> work?
I think this is the usual mixup of AVL and MVL.
AVL: is part...