search for: rhsc

Displaying 11 results from an estimated 11 matches for "rhsc".

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2010 Oct 04
2
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG
...e ISD::AND: // If the RHS is a constant, check to see if the LHS would be zero without // using the bits from the RHS. Below, we use knowledge about the RHS to // simplify the LHS, here we're using information from the LHS to simplify // the RHS. if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { APInt LHSZero, LHSOne; TLO.DAG.ComputeMaskedBits(Op.getOperand(0), NewMask, LHSZero, LHSOne, Depth+1); // If the LHS already has zeros where RHSC does, this and is dead. if ((LHSZero...
2010 Oct 04
0
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG
...is a constant, check to see if the LHS would be zero > without > // using the bits from the RHS. Below, we use knowledge about the > RHS to > // simplify the LHS, here we're using information from the LHS to > simplify > // the RHS. > if (ConstantSDNode *RHSC = > dyn_cast<ConstantSDNode>(Op.getOperand(1))) { > APInt LHSZero, LHSOne; > TLO.DAG.ComputeMaskedBits(Op.getOperand(0), NewMask, > LHSZero, LHSOne, Depth+1); > // If the LHS already has zeros where RHSC does, this and is dead....
2013 Apr 08
1
[LLVMdev] Is r174746 broken on ARM?
...I suspect that the first snippet (where OV is inverted) is wrong because ARM implementation of getPreIndexedAddressParts inverts Offset for pre-decrement case, both for ARM and Thumb2, in getARMIndexedAddressParts and getT2IndexedAddressParts, respectively, in a calls to: Offset = DAG.getConstant(-RHSC, RHS->getValueType(0)); ^^^^^ here! So you don't need to invert it one more time in DAGCombiner::CombineToPreIndexedLoadStore. Dmitry
2010 Oct 01
0
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG? (Re: comparison pattern trouble - might be a bug in LLVM 2.8?)
...return DAG.getNode(ISD::BRCOND, N->getDebugLoc(), > MVT::Other, Chain, Tmp, N2); > } > } > > if (Op0.getOpcode() != ISD::SETCC && Op1.getOpcode() != ISD::SETCC) { > bool Equal = false; > if (ConstantSDNode *RHSCI = dyn_cast<ConstantSDNode>(Op0)) > if (RHSCI->getAPIntValue() == 1 && Op0.hasOneUse() && > Op0.getOpcode() == ISD::XOR) { > TheXor = Op0.getNode(); > Equal = true; > } > > SDValue NodeToReplace = T...
2013 Apr 04
0
[LLVMdev] Is r174746 broken on ARM?
----- Original Message ----- > From: "Dmitry Antipov" <antipov at dev.rtsoft.ru> > To: "Hal Finkel" <hfinkel at anl.gov> > Cc: "Renato Golin" <renato.golin at linaro.org>, llvmdev at cs.uiuc.edu > Sent: Thursday, April 4, 2013 3:22:05 AM > Subject: Is r174746 broken on ARM? > > Hello Hal, > > I have a strong suspicion
2016 Feb 16
2
Intrinsic opt failure
...b/Transforms/InstCombine/InstCombineCompares.cpp there is attempt to optimize fabs: if (F->getIntrinsicID() == Intrinsic::fabs || ... switch (I.getPredicate()) { ... case FCmpInst::FCMP_OGT: return new FCmpInst(FCmpInst::FCMP_ONE, CI->getArgOperand(0), RHSC); But CI->getArgOperand(0) returns operand with type (double*) rather then double, because in our ABI doubles are passed via memory. Next assertion fires inside FCmpInst ctor: llvm::FCmpInst::FCmpInst(llvm::CmpInst::Predicate, llvm::Value*, llvm::Value*, const llvm::Twine&): Assertion `g...
2013 Apr 04
2
[LLVMdev] Is r174746 broken on ARM?
Hello Hal, I have a strong suspicion that your constant folding optimization introduced at r174746 is broken on ARM. There is a bug about it: http://llvm.org/bugs/show_bug.cgi?id=15581 There is no such issue with 3.2, and reverting r174746 on top of r178740 also fixes the problem. I'm trying to fix it myself, but still have no good ideas; so it would be great to have an advice from you.
2010 Sep 30
4
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG? (Re: comparison pattern trouble - might be a bug in LLVM 2.8?)
...DAG.DeleteNode(TheXor); return DAG.getNode(ISD::BRCOND, N->getDebugLoc(), MVT::Other, Chain, Tmp, N2); } } if (Op0.getOpcode() != ISD::SETCC && Op1.getOpcode() != ISD::SETCC) { bool Equal = false; if (ConstantSDNode *RHSCI = dyn_cast<ConstantSDNode>(Op0)) if (RHSCI->getAPIntValue() == 1 && Op0.hasOneUse() && Op0.getOpcode() == ISD::XOR) { TheXor = Op0.getNode(); Equal = true; } SDValue NodeToReplace = Trunc ? SDValue(Trunc, 0) : N1...
2014 Sep 19
2
[LLVMdev] More careful treatment of floating point exceptions
Hi Sanjay, Thanks, I saw this flag and it's definitely should be considered, but it appeared to me to be static characteristic of target platform. I'm not sure how appropriate it would be to change its value from a front-end. It says "Has", while optional flag would rather say "Uses" meaning that implementation cares about floating point exceptions. Regards, Sergey
2014 Sep 25
2
[LLVMdev] More careful treatment of floating point exceptions
...e()) { default: return true; + case Instruction::FMul: + case Instruction::FAdd: + case Instruction::FSub: + case Instruction::FDiv: { + if (!HonorFPExceptions) { + return true; + } + + ConstantFP *LHSC = dyn_cast<ConstantFP>(Inst->getOperand(0)); + ConstantFP *RHSC = dyn_cast<ConstantFP>(Inst->getOperand(1)); + + if (!LHSC || !RHSC) { + return true; + } + + APFloat LHS = dyn_cast<ConstantFP>(Inst->getOperand(0))->getValueAPF(); + APFloat RHS = dyn_cast<ConstantFP>(Inst->getOperand(1))->getValueAPF(); + APFl...
2012 Jan 12
9
linux 3.3-pre-rc1: Starting domU fails with Error: Failed to query current memory allocation of dom0.
Hi Konrad, Today i tried linuses tree of today (last commit is 4c4d285ad5665bfbd983b95fde8d7a477d24a361). It boots dom0 fine, but it fails to start any domU with: "Error: Failed to query current memory allocation of dom0." With my previous 3.1.5 kernel everything is fine, nothing else changed in config in between. dmesg and xm dmesg attached -- Sander Dom0 shows: total