search for: rhs

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2012 May 21
0
[LLVMdev] APInt::sdivrem error?
OK, the code for sdivrem in APInt.h is wrong. Here's what's written: static void sdivrem(const APInt &LHS, const APInt &RHS, APInt &Quotient, APInt &Remainder) { if (LHS.isNegative()) { if (RHS.isNegative()) APInt::udivrem(-LHS, -RHS, Quotient, Remainder); else APInt::udivrem(-LHS, RHS, Quotient, Remainder); Quotient = -Quotient; Remainder = -Remainder;...
2012 May 21
3
[LLVMdev] APInt::sdivrem error?
I wrote the following bit of code static APInt FloorOfQuotient(APInt a, APInt b) { unsigned bits = a.getBitWidth(); APInt q(bits, 1), r(bits, 1); APInt::sdivrem(a, b, q, r); * errs() << "sdivrem(" << a << ", " << b << ") = (" << q << ", " << r << ")\n"; * if (r == 0) return q; else {
2013 Mar 11
3
Optimization in R similar to MS Excel Solver
...ot;firms": s <- as.matrix(read.table("C:/R/OPTIMALIZATION/DATA.TXT", dec = ",", sep=";",header=TRUE)) [2] [3] [4] [5] [6] [1] 30 20 60 40 66 90 [2] 20 30 60 40 66 90 [3] 25 31 60 40 66 90 [4] 27 26 60 40 66 90 row.signs <- rep ("=", 4) row.rhs <- c(15,10,5,30) col.signs <- rep ("=", 6) col.rhs <- c(1,1,1,1,1,1) lp.transport (costs, "min", row.signs, row.rhs, col.signs, col.rhs, presolve=0, compute.sens=0) lp.transport (costs, "min", row.signs, row.rhs, col.signs, col.rhs, presolve=0, compute.sens=0)...
2015 Jul 11
2
[LLVMdev] StringMap question
Hello everyone! I'm a newcomer for the great LLVM project. I've started to explore the source code of LLVM project to become more familiar with it, and I've found some strange usage of move semantics in constructor of StringMapImpl( StringMapImpl &&RHS) {...} class in include/llvm/ADT/StringMap.h line 56. Could anyone explain me the purpose of zeroing of all fields of RHS in the body of this constructor if the declaration of the constructor uses move semantics? Here is the consturctor code below: *StringMapImpl(StringMapImpl &&RHS)* *...
2009 Jan 23
2
[LLVMdev] Small problem in BitVector.h
...Is it OK to commit? - Roman Index: BitVector.h =================================================================== --- BitVector.h (revision 62258) +++ BitVector.h (working copy) @@ -286,7 +286,7 @@ } // Intersection, union, disjoint union. - BitVector operator&=(const BitVector &RHS) { + BitVector &operator&=(const BitVector &RHS) { unsigned ThisWords = NumBitWords(size()); unsigned RHSWords = NumBitWords(RHS.size()); unsigned i; @@ -302,14 +302,14 @@ return *this; } - BitVector operator|=(const BitVector &RHS) { + BitVector &ope...
2007 Aug 14
1
[LLVMdev] Static functions for APInt
...er. If the input number has no bits set -1U is + /// returned. + static unsigned int tcLSB(const integerPart *, unsigned int); + static unsigned int tcMSB(const integerPart *, unsigned int); + + /// Negate a bignum in-place. + static void tcNegate(integerPart *, unsigned int); + + /// DST += RHS + CARRY where CARRY is zero or one. Returns the + /// carry flag. + static integerPart tcAdd(integerPart *, const integerPart *, + integerPart carry, unsigned); + + /// DST -= RHS + CARRY where CARRY is zero or one. Returns the + /// carry flag. + static integerPart tcSubtract(integerPa...
2007 Aug 18
1
[LLVMdev] Soft floating point support
This patch supplies software IEEE floating point support. The comment from the patch reproduced below says all there is to say. This patch contains the prior "cleanup" patch; please don't apply that one. Please let me know of any bugs. It is tested reasonably well, but until I put together random tests it's hard to have 100% confidence. Neil. /* A self-contained host- and
2007 Nov 21
3
[LLVMdev] Add/sub with carry; widening multiply
I've been playing around with llvm lately and I was wondering something about the bitcode instructions for basic arithmetic. Is there any plan to provide instructions that perform widening multiply, or add with carry? It might be written as: mulw i32 %lhs %rhs -> i64 ; widening multiply addw i32 %lhs %rhs -> i33 ; widening add addc i32 %lhs, i32 %rhs, i1 %c -> i33 ; add with carry Alternatively, would something like following get reduced to a single multiply and two stores on arch's that support wide multiplies, like x86-32 and ARM? define...
2011 Oct 01
1
[LLVMdev] Tablegen: RegisterInfoEmitter.cpp
...h string elemnts are numerical. Find then an outcome based on the number of consecutive digits in the strings while disregarding the value of the digits, eg a12b < a123. I guess then this order should hold: a12 == a22 < a1b, for these strings. Looking at StringRef::compare_numeric(StringRef RHS), the problem is, for a12 and a1b, Data[1]==RHS.Data[1], and the continue is reached. Data[2] is then less than RHS.Data[2], so a12 < a1b. But in the case for a22 and a1b, we get the opposite, since '2'!='1', and 22 is more digits than 1. So we get a12 < a1b < a22, which i...
2001 Oct 26
0
[RHSA-2001:112-07] Printing exposes system files to reading.
--------------------------------------------------------------------- Red Hat, Inc. Red Hat Security Advisory Synopsis: Printing exposes system files to reading. Advisory ID: RHSA-2001:112-07 Issue date: 2001-09-24 Updated on: 2001-10-25 Product: Red Hat Linux Keywords: Ghostscript lpr LPRng printing Cross references: Obsoletes: --------------------------------------------------------------------- 1. Topic: When used in a spooli...
2006 Feb 08
1
ARULES --> Filtering Rules by RHS
Dear Colleagues, I would like to only inspect rules that contain a certain label substring on the rhs. In this special case the item labels are built like this: <itemtype>_<itemvalue> e.g. "Artikelgruppe_E0815" what I want to do is only show rules where "Artikelgruppe" is contained in the rhs - has anybody an idea how this could work? Sincerely _____________...
2011 Sep 13
3
[LLVMdev] Setting priority in instruction selection
...mmediate value to be selected before the immediate instruction itself. So, my question is this, is there anyway to force the ordering of how the instructions get selected. For example, take this pattern (A & B) | (C & ~B), I have the following PatFrag: /// Pattern 1: (lhs & bitpat) | (rhs & ~bitpat) def bfi_pat1 : PatFrag<(ops node:$lhs, node:$rhs, node:$bitpat), (or (and node:$lhs, node:$bitpat), (and node:$rhs, (not node:$lhs)))>; def BFI_i32 : ThreeInOneOut<IL_OP_BFI, (outs GPRI32:$dst), (ins GPRI32:$lhs, GPRI32:$rhs, GPRI32:$bitpat), !strconcat...
2007 Mar 09
1
lpSolve space problem in R 2.4.1 on Windows XP
...>(csv1=cumsum(as.numeric(v1))) [1] 8 15 21 26 30 33 35 36 >(lencsv1=length(csv1)) [1] 8 >(Nm1=lencsv1-1) [1] 7 >(Np1=lencsv1+1) [1] 9 >ngp=3 >f.obj=c(1,1,rep(0,Nm1)) >f.int=3:Np1 >bin.con=cbind(rep(0,Nm1),rep(0,Nm1),diag(Nm1)) >bin.dir=rep("<=",Nm1) >bin.rhs=rep(1,Nm1) >gp.con=c(0,0,rep(1,Nm1)) >gp.dir="<=" >(gp.rhs=ngp-1) [1] 2 >ub.con=cbind(rep(-1,rep(Nm1)),rep(0,Nm1),!upper.tri(matrix(nrow=Nm1,ncol=Nm1))) >ub.dir=rep("<=",Nm1) >(ub.rhs=csv1[1:Nm1]*ngp/csv1[lencsv1]) [1] 0.6666667 1.2500000 1.7500000 2.1666...
2007 Sep 25
2
[LLVMdev] Coalescing and VNInfo
LLVM is assuming this: struct InstrSlots { enum { LOAD = 0, USE = 1, DEF = 2, STORE = 3, NUM = 4 }; So VNI->def is always modulo 2. For coalescing, it's checking if the RHS is live at the "use" cycle. So it's checking VNI->def-1. Evan On Sep 25, 2007, at 8:55 AM, David Greene wrote: > On Tuesday 25 September 2007 10:49, David Greene wrote: >> I've hit a bug in a refactored version of coalescing and I'm >> trying to >>...
2011 Sep 30
0
[LLVMdev] Tablegen: RegisterInfoEmitter.cpp
On Sep 30, 2011, at 8:29 AM, Jonas Paulsson wrote: > The conclusion is that the StringRef::compare_numeric() is not deterministic Thanks for tracking this down. I believe we have a bug in compare_numeric() causing it to be non-transitive sometimes. It is supposed to provide a total ordering of strings. Can you find the bug? /jakob -------------- next part -------------- An HTML attachment
2011 Sep 22
2
[LLVMdev] Need help in converting int to double
...rst)... Below is the code snippet.... > > > lhs = mBuilder.CreateStructGEP(firstArg, 0); > lhs = mBuilder.CreateLoad(lhs); > lhs = mBuilder.CreatePointerCast(lhs, PointerType::get( > mBuilder.getInt64Ty(), 0)); > int typelhs = getValueType(lhs); > rhs = mBuilder.CreateStructGEP(secondArg, 0); > rhs = mBuilder.CreateLoad(rhs); > rhs = mBuilder.CreatePointerCast(rhs, PointerType::get( > mBuilder.getInt64Ty(), 0)); > > lhs = mBuilder.CreateLoad(lhs); > rhs = mBuilder.CreateLoad(rhs); > > lhs =...
2007 Sep 25
1
[LLVMdev] Coalescing and VNInfo
On Tuesday 25 September 2007 13:28, David Greene wrote: > > So VNI->def is always modulo 2. For coalescing, it's checking if the > > RHS is live at the "use" cycle. So it's checking VNI->def-1. > > But why is it looking at a use slot in this case, where the coalescer is > trying to get the vaue number for the def of the RHS register so it can > use that value number in the resulting merged live interval?...
2012 Nov 28
1
Help setting optimization problem to include more constraints
...s to be shipped from warehouse i to destinaton j (i = 1, 2, 3, 4; j= 1, 2, 3). If c_{ij} is the cost of shipping one unit from warehouse i to destination j, the formulation in R would be as follows: require(lpSolve) f <- matrix(c(1, 3, 4, 3, 2, 3, 2, 2, 1, 1, 3, 1), ncol = 3, byrow = TRUE) row.rhs <- c(300, 200, 200, 200) col.rhs <- c(350, 250, 300) row.signs <- rep("==", length(row.rhs)) col.signs <- rep("==", length(col.rhs)) lp.transport(f, "min", row.signs, row.rhs, col.signs, col.rhs) D <- lp.transport(f, "min", row.signs, row.rhs,...
2011 Sep 22
3
[LLVMdev] Need help in converting int to double
...d". Now i'm writing code for shift left(SHL) operator. I had my own Value Structure .. it's like this Struct Value { void *val ; char type; } The "char type" holds DoubleType,DoubleConst,StringType,StringConst... when i'm executing the IrBuilder.CreateShl(LHS,RHS) instruction it is returning an integer value as output.. i'm unable to store the value in my structure....(because my structure can hold Doubles,Strings). Is there any way to store the integer output in my structure( i used CreateSIToFP() to change int to double)........ Thanks in advance...
2007 Apr 20
1
nlme trouble
...Lin(Molecular.Volume,nu,a,b,c,x0)|study,data=ge) #This is where I get the error contr = nlmeControl(pnlsTol=0.3) ge0.nlme=nlme(gelist,control=contr,verbose=F) ##########Errors####################### > gelist = nlsList(RBA~SSBiLin(Molecular.Volume,nu,a,b,c,x0)|study,data=ge) Error in qr(attr(rhs, "gradient")) : NA/NaN/Inf in foreign function call (arg 1) In addition: Warning message: NaNs produced in: log(x, base) Error in qr(attr(rhs, "gradient")) : NA/NaN/Inf in foreign function call (arg 1) In addition: Warning message: NaNs produced in: log(x, base) Error in qr(attr...