Displaying 3 results from an estimated 3 matches for "rge50059f6b6b3".
2020 Sep 09
4
RFC: Promoting experimental reduction intrinsics to first class intrinsics
...reduction."
>
> Please could we add some pseudocode to show exactly how the intrinsic will
> be re-expanded for ordered cases?
> On 16/06/2020 19:38, Sanjay Patel via llvm-dev wrote:
>
> We switched over to producing the intrinsics for x86 with:
> https://reviews.llvm.org/rGe50059f6b6b3
> ...I'm not aware of any regressions yet.
>
> https://bugs.llvm.org/show_bug.cgi?id=45378 is also fixed as of today.
>
> So that leaves the problem with fmin/fmax when no fast-math-flags are
> specified. We need to update the LangRef with whatever the expected
> behavior i...
2020 Jun 17
2
RFC: Promoting experimental reduction intrinsics to first class intrinsics
...ivity of a scalarized
reduction."
Please could we add some pseudocode to show exactly how the intrinsic
will be re-expanded for ordered cases?
On 16/06/2020 19:38, Sanjay Patel via llvm-dev wrote:
> We switched over to producing the intrinsics for x86 with:
> https://reviews.llvm.org/rGe50059f6b6b3
> ...I'm not aware of any regressions yet.
>
> https://bugs.llvm.org/show_bug.cgi?id=45378 is also fixed as of today.
>
> So that leaves the problem with fmin/fmax when no fast-math-flags are
> specified. We need to update the LangRef with whatever the expected
> behavior...
2020 Apr 09
2
RFC: Promoting experimental reduction intrinsics to first class intrinsics
No we still use the shuffle expansion which is why the issue isn't unique
to the intrinsic.
~Craig
On Thu, Apr 9, 2020 at 10:21 AM Amara Emerson <aemerson at apple.com> wrote:
> Has x86 switched to the intrinsics now?
>
> On Apr 9, 2020, at 10:17 AM, Craig Topper <craig.topper at gmail.com> wrote:
>
> That recent X86 bug isn't unique to the intrinsic. We