Displaying 10 results from an estimated 10 matches for "rfp32".
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fp32
2009 Apr 28
1
[LLVMdev] Register class intersection
...e considered
disjoint.
There is a complication, though. A register class is not just a set of
registers - it also holds information about spill size and alignment.
Value types are no longer interesting once the selection DAG has been
destroyed. X86 has the weird examples as usual:
Classes RFP32, RFP64, and RFP80 are identical (FP0-6) except for the
spill size.
The same goes for FR64 and VR128 (XMM0-15).
The coalescer will join these classes as follows:
RFP32 + RFP64 -> RFP64
FR64 + VR128 -> VR128
This seems perfectly reasonable - choose the larger spill size and
avoid losing...
2013 Jul 19
3
[LLVMdev] fptoui calling a function that modifies ECX
Try adding ECX to the Defs of this part of
lib/Target/X86/X86InstrCompiler.td like I've done below. I don't have a
Windows machine to test myself.
let Defs = [EAX, EDX, ECX, EFLAGS], FPForm = SpecialFP in {
def WIN_FTOL_32 : I<0, Pseudo, (outs), (ins RFP32:$src),
"# win32 fptoui",
[(X86WinFTOL RFP32:$src)]>,
Requires<[In32BitMode]>;
def WIN_FTOL_64 : I<0, Pseudo, (outs), (ins RFP64:$src),
"# win32 fptoui",
[(X...
2013 Jul 19
2
[LLVMdev] fptoui calling a function that modifies ECX
...>
> Try adding ECX to the Defs of this part of
> lib/Target/X86/X86InstrCompiler.td like I've done below. I don't have a
> Windows machine to test myself.
>
> let Defs = [EAX, EDX, ECX, EFLAGS], FPForm = SpecialFP in {
> def WIN_FTOL_32 : I<0, Pseudo, (outs), (ins RFP32:$src),
> "# win32 fptoui",
> [(X86WinFTOL RFP32:$src)]>,
> Requires<[In32BitMode]>;
>
> def WIN_FTOL_64 : I<0, Pseudo, (outs), (ins RFP64:$src),
> "# win32 fptoui&qu...
2013 Jul 19
2
[LLVMdev] fptoui calling a function that modifies ECX
...ECX to the Defs of this part of
>> lib/Target/X86/X86InstrCompiler.td like I've done below. I don't have a
>> Windows machine to test myself.
>>
>> let Defs = [EAX, EDX, ECX, EFLAGS], FPForm = SpecialFP in {
>> def WIN_FTOL_32 : I<0, Pseudo, (outs), (ins RFP32:$src),
>> "# win32 fptoui",
>> [(X86WinFTOL RFP32:$src)]>,
>> Requires<[In32BitMode]>;
>>
>> def WIN_FTOL_64 : I<0, Pseudo, (outs), (ins RFP64:$src),
>>...
2013 Jul 19
0
[LLVMdev] fptoui calling a function that modifies ECX
...te:
> Try adding ECX to the Defs of this part of
> lib/Target/X86/X86InstrCompiler.td like I've done below. I don't have
> a Windows machine to test myself.
>
> let Defs = [EAX, EDX, ECX, EFLAGS], FPForm = SpecialFP in {
> def WIN_FTOL_32 : I<0, Pseudo, (outs), (ins RFP32:$src),
> "# win32 fptoui",
> [(X86WinFTOL RFP32:$src)]>,
> Requires<[In32BitMode]>;
>
> def WIN_FTOL_64 : I<0, Pseudo, (outs), (ins RFP64:$src),
> "# win32 fptoui&quo...
2013 Jul 19
0
[LLVMdev] fptoui calling a function that modifies ECX
...s of this part of
>> lib/Target/X86/X86InstrCompiler.td like I've done below. I don't
>> have a Windows machine to test myself.
>>
>> let Defs = [EAX, EDX, ECX, EFLAGS], FPForm = SpecialFP in {
>> def WIN_FTOL_32 : I<0, Pseudo, (outs), (ins RFP32:$src),
>> "# win32 fptoui",
>> [(X86WinFTOL RFP32:$src)]>,
>> Requires<[In32BitMode]>;
>>
>> def WIN_FTOL_64 : I<0, Pseudo, (outs), (ins RFP64:$src),
>>...
2013 Jul 20
0
[LLVMdev] fptoui calling a function that modifies ECX
...lib/Target/X86/X86InstrCompiler.td like I've done below. I
>>> don't have a Windows machine to test myself.
>>>
>>> let Defs = [EAX, EDX, ECX, EFLAGS], FPForm = SpecialFP in {
>>> def WIN_FTOL_32 : I<0, Pseudo, (outs), (ins RFP32:$src),
>>> "# win32 fptoui",
>>> [(X86WinFTOL RFP32:$src)]>,
>>> Requires<[In32BitMode]>;
>>>
>>> def WIN_FTOL_64 : I<0, Pseudo, (outs), (ins RFP64:$src),
>>>...
2013 Jul 19
0
[LLVMdev] fptoui calling a function that modifies ECX
Oh, excellent point, I agree. My bad. Now that I'm not assuming those
are the sqrt, I see the sqrtpd's in the output. Also there are three
fptoui's and there are 3 call instances.
(Changing subject line again.)
Now it looks like it's bug #13862
On 19/07/2013 4:51 PM, Craig Topper wrote:
> I think those calls correspond to this
>
> %110 = fptoui double %109 to i32
2017 Jul 28
3
Purpose of various register classes in X86 target
Hello Matthias,
On 28 July 2017 at 04:13, Matthias Braun <mbraun at apple.com> wrote:
> It's not that hard in principle:
> - A register class is a set of registers.
> - Virtual Registers have a register class assigned.
> - If you have register constraints (like x86 8bit operations only work on
> al,ah,etc.) then you have to create a new register class to express that.
2013 Jul 19
4
[LLVMdev] SIMD instructions and memory alignment on X86
Hmm, I'm not able to get those .ll files to compile if I disable SSE and I
end up with SSE instructions(including sqrtpd) if I don't disable it.
On Thu, Jul 18, 2013 at 10:53 PM, Peter Newman <peter at uformia.com> wrote:
> Is there something specifically required to enable SSE? If it's not
> detected as available (based from the target triple?) then I don't think