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2016 Oct 28
1
Vector Shuffle chain lowering to X86 instructions simplification inconsistencies
...shuffle sequence containing types of 128 wide gets reduced a single shuffle, where as the second shuffle sequence containing types of 256 wide doesn't get reduced to a single shuffle instruction in the resulting X86 code (Shuffle.s attached). The second sequence is identical to first and is a rewidening of the sequence for a higher vector length. Can this be explained and where in the machine lowering passes does this simplification happen? Thanks -- Kind regards, Charith Mendis Graduate Student, CSAIL, Massachusetts Institute of Technology -------------- next part -------------- An HTML a...