search for: resno

...pci_update_resource(dev, i); } static struct pci_platform_pm_ops *pci_platform_pm; @@ -1864,6 +1849,53 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags) return bars; } +/** + * pci_resource_alignment - get a PCI BAR resource alignment + * @dev: the PCI device + * @resno: the resource number + * + * Returns alignment size on success, or 0 on error. + */ +int pci_resource_alignment(struct pci_dev *dev, int resno) +{ + resource_size_t align; + struct resource *res = dev->resource + resno; + + align = resource_alignment(res); + if (align) +...

...pci_update_resource(dev, i); } static struct pci_platform_pm_ops *pci_platform_pm; @@ -1864,6 +1849,53 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags) return bars; } +/** + * pci_resource_alignment - get a PCI BAR resource alignment + * @dev: the PCI device + * @resno: the resource number + * + * Returns alignment size on success, or 0 on error. + */ +int pci_resource_alignment(struct pci_dev *dev, int resno) +{ + resource_size_t align; + struct resource *res = dev->resource + resno; + + align = resource_alignment(res); + if (align) +...

...ultiple results!” from the default case in VectorLegalizer::Expand. Hence custom lowering. All the types are legal at this stage. I would appreciate some clarification on how custom lowering of nodes with multiple return values behaves. My theory is: - The lowering function is called once per ResNo - On each invocation, generate an SDValue for each ResNo - Generate an ISD::MERGE_VALUES nodes to combine all of these SDValues - Mutate the ResNo in the SDValue wrapping the ISD::MERGE_VALUES to match the input ResNo If that’s the right way to go, great. Confirmation would be appreciated....

...S; i++) + pci_update_resource(dev, i); } static struct pci_platform_pm_ops *pci_platform_pm; @@ -1864,6 +1849,53 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags) return bars; } +/** + * pci_resource_alignment - get a PCI BAR resource alignment + * @dev: the PCI device + * @resno: the resource number + * + * Returns alignment size on success, or 0 on error. + */ +int pci_resource_alignment(struct pci_dev *dev, int resno) +{ + resource_size_t align; + struct resource *res = dev->resource + resno; + + align = resource_alignment(res); + if (align) + return align; + + if (r...

...S; i++) + pci_update_resource(dev, i); } static struct pci_platform_pm_ops *pci_platform_pm; @@ -1864,6 +1849,53 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags) return bars; } +/** + * pci_resource_alignment - get a PCI BAR resource alignment + * @dev: the PCI device + * @resno: the resource number + * + * Returns alignment size on success, or 0 on error. + */ +int pci_resource_alignment(struct pci_dev *dev, int resno) +{ + resource_size_t align; + struct resource *res = dev->resource + resno; + + align = resource_alignment(res); + if (align) + return align; + + if (r...

...S; i++) + pci_update_resource(dev, i); } static struct pci_platform_pm_ops *pci_platform_pm; @@ -1864,6 +1849,53 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags) return bars; } +/** + * pci_resource_alignment - get a PCI BAR resource alignment + * @dev: the PCI device + * @resno: the resource number + * + * Returns alignment size on success, or 0 on error. + */ +int pci_resource_alignment(struct pci_dev *dev, int resno) +{ + resource_size_t align; + struct resource *res = dev->resource + resno; + + align = resource_alignment(res); + if (align) + return align; + + if (r...

...is EE uses a recursive function (??), it seems an inherent limitation in how big llvm functions can be. Simon. gdb backtrace: #0 0x40b126a3 in (anonymous namespace)::X86DAGToDAGISel::Select_store(llvm::SDOperand&, llvm::SDOperand) (this=0x822d660, Result=@0xbf800a10, N={Val = 0x8254338, ResNo = 0}) at X86GenDAGISel.inc:19768 #1 0x40b01b44 in (anonymous namespace)::X86DAGToDAGISel::SelectCode(llvm::SDOperand&, llvm::SDOperand) (this=0x822d660, Result=@0xbf800a10, N={Val = 0x8254338, ResNo = 0}) at X86GenDAGISel.inc:27833 #2 0x40ada64f in (anonymous namespace)::X86DAGToDAGISel:...

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Major changes between v4 -> v5: 1, remove interfaces for PF driver to create sysfs entries (Matthew

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Major changes between v4 -> v5: 1, remove interfaces for PF driver to create sysfs entries (Matthew

...it a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index 1a5fc83..059de16 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -26,11 +26,20 @@ #include <linux/slab.h> #include "pci.h" -void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno) +/** + * pci_update_base - update a PCI BAR + * @dev: PCI device + * @type: type of BAR + * @res: resource info used to update BAR + * @pos: BAR position in config space + * + * If the type is not unknown, we assume that the lowest bit is 'enable'. + */ +void pci_update_base(struct pci_dev...

...it a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index 1a5fc83..059de16 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -26,11 +26,20 @@ #include <linux/slab.h> #include "pci.h" -void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno) +/** + * pci_update_base - update a PCI BAR + * @dev: PCI device + * @type: type of BAR + * @res: resource info used to update BAR + * @pos: BAR position in config space + * + * If the type is not unknown, we assume that the lowest bit is 'enable'. + */ +void pci_update_base(struct pci_dev...

...it a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index 1a5fc83..059de16 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -26,11 +26,20 @@ #include <linux/slab.h> #include "pci.h" -void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno) +/** + * pci_update_base - update a PCI BAR + * @dev: PCI device + * @type: type of BAR + * @res: resource info used to update BAR + * @pos: BAR position in config space + * + * If the type is not unknown, we assume that the lowest bit is 'enable'. + */ +void pci_update_base(struct pci_dev...

...i/pci.h Wed Oct 08 12:12:27 2008 +0900 @@ -99,3 +99,8 @@ return NULL; } +#define ROUND_UP_TO_PAGESIZE(size) ((size + PAGE_SIZE - 1) & ~(PAGE_SIZE - 1)) + +extern int reassign_resources; +extern int is_reassigndev(struct pci_dev *dev); +extern void pci_update_bridge(struct pci_dev *dev, int resno); diff -r b54652ee29ef drivers/pci/quirks.c --- a/drivers/pci/quirks.c Thu Oct 02 11:29:02 2008 +0100 +++ b/drivers/pci/quirks.c Wed Oct 08 12:12:27 2008 +0900 @@ -33,6 +33,19 @@ } __setup("pci-mem-align", set_pci_mem_align); + +int reassign_resources = 0; + +static int __init set_rea...

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Changes from v5 to v6: 1, update ABI document to include SR-IOV sysfs entries (Greg KH) 2, fix two coding

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Changes from v5 to v6: 1, update ABI document to include SR-IOV sysfs entries (Greg KH) 2, fix two coding

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. Changes from v5 to v6: 1, update ABI document to include SR-IOV sysfs entries (Greg KH) 2, fix two coding

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. [PATCH 1/8 v4] PCI: define PCI resource names in a 'enum' [PATCH 2/8 v4] PCI: export __pci_read_base

Greetings, Following patches are intended to support SR-IOV capability in the Linux kernel. With these patches, people can turn a PCI device with the capability into multiple ones from software perspective, which will benefit KVM and achieve other purposes such as QoS, security, and etc. [PATCH 1/8 v4] PCI: define PCI resource names in a 'enum' [PATCH 2/8 v4] PCI: export __pci_read_base

...is EE uses a recursive function (??), it seems an inherent limitation in how big llvm functions can be. Simon. gdb backtrace: #0 0x40b126a3 in (anonymous namespace)::X86DAGToDAGISel::Select_store(llvm::SDOperand&, llvm::SDOperand) (this=0x822d660, Result=@0xbf800a10, N={Val = 0x8254338, ResNo = 0}) at X86GenDAGISel.inc:19768 #1 0x40b01b44 in (anonymous namespace)::X86DAGToDAGISel::SelectCode(llvm::SDOperand&, llvm::SDOperand) (this=0x822d660, Result=@0xbf800a10, N={Val = 0x8254338, ResNo = 0}) at X86GenDAGISel.inc:27833 #2 0x40ada64f in (anonymous namespace)::X86DAGToDAGISel:...

FAIL: /usr/home/llvm/obj/../test/Regression/CodeGen/X86/io.llx: Assertion failed: (ResNo < Values.size() && "Illegal result number!"), function getValueType, file /usr/home/llvm/obj/../include/llvm/CodeGen/SelectionDAGNodes.h, line 507. Abort trap (core dumped) FAIL: /usr/home/llvm/obj/../test/Regression/CodeGen/X86/ioport.llx: Assertion failed: (ResNo < Valu...