search for: resistors

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2013 Oct 13
27
GTX 670 Tips?
...t and hard mods are working. I bought the GTX 670 model in David''s article, I will be giving this a shot in a week. I was hoping to ask a few questions. 1. Is there a specific qemu version required (traditional or the new default)? 2. What (if anything) should be done after removing the resistors (NVFlash to 1/2 GRID K2)? If you have any other tips or advice you can send my way that would be great. Thank you both for all your work, experimentation, learning and passing along new passthrough options. Cheers, Casey _______________________________________________ Xen-users mailing list X...
2016 Jul 27
0
[PATCH] nvkm/iccsense: Parse the resistors and config the right way
...nvkm/subdev/bios/iccsense.h @@ -1,10 +1,16 @@ #ifndef __NVBIOS_ICCSENSE_H__ #define __NVBIOS_ICCSENSE_H__ +struct pwr_rail_resistor_t { + u8 mohm; + bool enabled; +}; + struct pwr_rail_t { u8 mode; u8 extdev_id; - u8 resistor_mohm; - u8 rail; + u8 resistor_count; + struct pwr_rail_resistor_t resistors[3]; + u16 config; }; struct nvbios_iccsense { diff --git a/drm/nouveau/nvkm/subdev/bios/iccsense.c b/drm/nouveau/nvkm/subdev/bios/iccsense.c index 0843280..aafd5e1 100644 --- a/drm/nouveau/nvkm/subdev/bios/iccsense.c +++ b/drm/nouveau/nvkm/subdev/bios/iccsense.c @@ -23,6 +23,7 @@ */ #include...
2008 Apr 12
2
X100M never goes on-hook state
Hi guys, I've been experiencing a very strange issue with my Digium Card TDM400 as of this week. It has two FXS and two FXO. The FXO modules (both of them) never goes on-hook after hanging up in Asterisk. It had worked perfectly well for over four years. I put an ammeter in series with the line and the card, and immediately after plugging the connector to the card, I got 26mA in the circuit
2013 Dec 16
3
[LLVMdev] Float undef value propagation
On 12/14/2013 05:18 PM, Dan Gohman wrote: > On Thu, Dec 12, 2013 at 5:43 PM, Owen Anderson <resistor at mac.com > <mailto:resistor at mac.com>> wrote: > > > On Dec 12, 2013, at 4:57 PM, Philip Reames > <listmail at philipreames.com <mailto:listmail at philipreames.com>> wrote: > >> undef + any == NaN (since undef can be NaN) or undef +
2005 Mar 03
0
new package: ResistorArray
...s, and solves a number of classical problems such as the resistance between opposite points of a skeleton resistor cube, and the Wheatstone bridge. The package comes with a variety of standard resistor arrays, including all five platonic solids, the Fibonacci ladder, and "N" arbitrary resistors in series. The package gives nice numerical illustrations of a few theoretical results from the recent (2004) literature. One of the Google aptitude tests was to determine the electrical resistance between two points on an infinite grid of resistors. I couldn't solve this problem analytica...
2005 Mar 03
0
new package: ResistorArray
...s, and solves a number of classical problems such as the resistance between opposite points of a skeleton resistor cube, and the Wheatstone bridge. The package comes with a variety of standard resistor arrays, including all five platonic solids, the Fibonacci ladder, and "N" arbitrary resistors in series. The package gives nice numerical illustrations of a few theoretical results from the recent (2004) literature. One of the Google aptitude tests was to determine the electrical resistance between two points on an infinite grid of resistors. I couldn't solve this problem analytica...
2014 Nov 17
2
[LLVMdev] [llvm][SelectionDAG] trivial patch: fix misprint in SelectionDAGLegalize::ExpandInsertToVectorThroughStack
Alright, go ahead with it. —Owen > On Nov 17, 2014, at 4:58 AM, Daniil Troshkov <troshkovdanil at gmail.com> wrote: > > Hi! > > I have not found test case. (It is because we have no target using "ExpandInsertToVectorThroughStack"). > But I tested it for target currently not included in llvm trunk. > > This fix correct and trivial, so I'm offering
2013 Dec 16
0
[LLVMdev] Float undef value propagation
On Sun, Dec 15, 2013 at 5:12 PM, Philip Reames <listmail at philipreames.com>wrote: > On 12/14/2013 05:18 PM, Dan Gohman wrote: > >> On Thu, Dec 12, 2013 at 5:43 PM, Owen Anderson <resistor at mac.com >> <mailto:resistor at mac.com>> wrote: >> >> >> On Dec 12, 2013, at 4:57 PM, Philip Reames >> <listmail at philipreames.com
2013 Jul 31
11
Is it possible to mod a Geforce GTX 560 graphics card into a Quadro?
Dear Gordan, I have a Gigabyte Geforce GTX 560. Is it possible to mod it into a Quadro? If it is possible, please give me the link with the list of steps to mod it into a Quadro. Is it a simple process? Thank you very much. -- Yours sincerely, Singapore Citizen Mr. Teo En Ming (Zhang Enming)
2013 Jul 31
11
Is it possible to mod a Geforce GTX 560 graphics card into a Quadro?
Dear Gordan, I have a Gigabyte Geforce GTX 560. Is it possible to mod it into a Quadro? If it is possible, please give me the link with the list of steps to mod it into a Quadro. Is it a simple process? Thank you very much. -- Yours sincerely, Singapore Citizen Mr. Teo En Ming (Zhang Enming)
2009 May 17
3
[LLVMdev] RFC: Atomics.h
Surprisingly enough, libatomic_ops doesn't define just a hardware memory fence call as far as I can tell. --Owen On May 16, 2009, at 3:00 PM, Zoltan Varga wrote: > Hi, > > You might want to use this: > > http://www.hpl.hp.com/research/linux/atomic_ops/ > > Zoltan > > On Sat, May 16, 2009 at 11:11 PM, Owen Anderson <resistor at
2005 Aug 09
0
How to lower float charge voltage of an APC Smart UPS unit
You can lower the float charge voltage that APC Smart UPS units such as SU1000NET or SU700NET supply to the battery. This is important when substituting Lead Acid Deep Cycle batteries for the usual sealed maintenance free batteries provided. Here are the instructions: 1) Only do this if you are fully trained and qualified to work on Lead Acid powered UPS. These units contain lethal voltages
2005 Aug 09
0
How to lower float charge voltage of an APC Smart UPS - corrected
My first posting had typos. Here is the corrected version: You can lower the float charge voltage that APC Smart UPS units such as SU1000NET or SU700NET supply to the battery. This is important to prevent overcharging when when substituting Lead Acid Deep Cycle batteries for the usual sealed maintenance free batteries provided. Instructions: 1) Only do this if you're fully trained and
2009 May 17
0
[LLVMdev] RFC: Atomics.h
What would you do with a just-hardware memory fence? If the compiler's free to move operations over the hardware fence, that seems to defeat the purpose. C++0X provides a compiler-only fence, and a hardware+compiler fence, but no hardware-only fence, I believe for this reason. See <http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2009/n2857.pdf>, section 29.8. On Sat, May 16, 2009 at
2015 May 26
4
[LLVMdev] RFC: Separate machine IR from lib/CodeGen into lib/MIR
> On May 26, 2015, at 1:37 PM, Duncan P. N. Exon Smith <dexonsmith at apple.com> wrote: > >> >> On 2015-May-26, at 09:46, Alex L <arphaman at gmail.com> wrote: >> >> Hi all, >> >> The CodeGen library is a big bag of interdependent bits. This caused >> a circular dependency in the MIR serialization commit (r237954), which got >>
2014 Jun 18
2
[LLVMdev] [RFC] Add a simple soft-float class
On Jun 18, 2014, at 3:05 PM, Bruce Hoult <bruce at hoult.org> wrote: > On Thu, Jun 19, 2014 at 8:29 AM, Owen Anderson <resistor at mac.com> wrote: > Numerical analysis is hard. Every numerics expert I have ever worked with considers trying to re-invent floating point a cardinal sin of numerical analysis. Just don’t do it. You will miss important considerations, and you will
2006 Aug 14
1
[LLVMdev] llvm cvs/svn installscript
Hi all! I wanted to test the LLVM system. By reading the homepage I figured that llvm-gcc4 seemed the best way to go. I tried to follow the homepage and the instructions in README.LLVM Sometimes confusing but in retrospect not that hard. But I could not produce the .bc file with a simple program no matter how hard I tried. After some help from resistor in #llvm it became clear that I did not
2014 Oct 28
2
[LLVMdev] Adding masked vector load and store intrinsics
Many oveloaded intrinsics may be replaced with instructions - fabs or fma or sqrt. Chandler will probably explain the criteria. What the diff between fma and fadd? Or fptrunc and fabs? A new instruction like %a = loadm <4 x i32>* %addr, <4 x i32> %passthru, i32 4, <4 x i1>%mask is possible, but may be not very useful for most of targets. So we start from intrinsics. -
2009 Feb 04
1
[LLVMdev] rol/ror llvm instruction set
--- On Tue, 2/3/09, Owen Anderson <resistor at mac.com> wrote: > From: Owen Anderson <resistor at mac.com> > Subject: Re: [LLVMdev] rol/ror llvm instruction set > To: kasra_n500 at yahoo.com, "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Date: Tuesday, February 3, 2009, 4:20 PM > On Feb 3, 2009, at 3:54 PM, Kasra wrote: > > I guess the
2014 Nov 12
2
[LLVMdev] [llvm][SelectionDAG] trivial patch: fix misprint in SelectionDAGLegalize::ExpandInsertToVectorThroughStack
I detected this bug using test case from platform which is not currently supported on llvm targets. (Our team is porting llvm on new target). Creating the test case will take some extra time. I'll try to do it ASAP. Have you any ideas about the test case? (targets using ExpandInsertToVectorThroughStack, etc...) On Wed, Nov 12, 2014 at 8:29 PM, Owen Anderson <resistor at mac.com> wrote: