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2014 Jan 28
2
[LLVMdev] Load Instruction that changes value of two registers
...ectly. How can I do that in LLVM? Where is the best place to do that(TableGen, Instruction Selection, Instruction Lowering)? It would be fine if I could tell LLVM that reg2 is invalid after a load Operation, but I don#t know how to do that... I tried the following in TableGen to let LLVM know that Resg2 isn't valid anymore after a load but it didn't produce the desired result: let Defs = [Regs2] in { def LD: Inst<(outs Regs1:$dst), (ins MEM:$addr), "load $addr, $dst;", [(set Regs1:$dst, (load addr:$addr))]>; } Thanks in advance, Markus -------------- next part -------...