search for: reset_timeout

...bian Etch. I installed open-iscsi, configure /etc/iscsi/iscsid.conf: --- node.active_cnx = 1 node.startup = automatic #node.session.auth.username = dima #node.session.auth.password = aloha node.session.timeo.replacement_timeout = 120 node.session.err_timeo.abort_timeout = 10 node.session.err_timeo.reset_timeout = 30 node.session.iscsi.InitialR2T = No node.session.iscsi.ImmediateData = Yes node.session.iscsi.FirstBurstLength = 262144 node.session.iscsi.MaxBurstLength = 16776192 node.session.iscsi.DefaultTime2Wait = 0 node.session.iscsi.DefaultTime2Retain = 0 node.session.iscsi.MaxConnections = 0 node.conn[...

...rq_deadman] jz .timeout -.chain: - pop gs - pop fs - pop es - pop ds - popa - jmp 0:0 - global pxe_irq_chain -pxe_irq_chain equ $-4 + ; Even though it isn't ours, we still need to send the + ; EOI ourselves, since chaining to the original + ; handler is too risky. + jmp .eoi .reset_timeout: mov [pxeirq_last],ax mov word [pxeirq_deadman],PXEIRQ_MAX - jmp .chain + jmp .eoi ; Too many spurious interrupts, shut off the interrupts ; and go to polling mode -- 2.9.3

...;1 1 eth0 192.168.1.10 3260 0" open-iscsi - /etc/iscsi/iscsid.conf: node.active_cnx = 1 node.startup = manual node.session.auth.username = jim node.session.auth.password = othersecret node.session.timeo.replacement_timeout = 120 node.session.err_timeo.abort_timeout = 10 node.session.err_timeo.reset_timeout = 30 node.session.iscsi.InitialR2T = No node.session.iscsi.ImmediateData = Yes node.session.iscsi.FirstBurstLength = 262144 node.session.iscsi.MaxBurstLength = 16776192 node.session.iscsi.DefaultTime2Wait = 0 node.session.iscsi.DefaultTime2Retain = 0 node.session.iscsi.MaxConnections = 1 node.conn[...

...> +#endif > + } > + } > + free(iovec); > +_stop_virtblk: > + stop_virtblk(mic); > +_close_backend: > + close_backend(mic); > + } /* forever */ > + > + pthread_exit(NULL); > +} > + > +static void > +reset(struct mic_info *mic) > +{ > +#define RESET_TIMEOUT 120 > + int i = RESET_TIMEOUT; > + setsysfs(mic->name, "state", "reset"); > + while (i) { > + char *state; > + state = readsysfs(mic->name, "state"); > + if (!state) > + goto retry; > + mpsslog("%s: %s %d state %s\n", >...

...> +#endif > + } > + } > + free(iovec); > +_stop_virtblk: > + stop_virtblk(mic); > +_close_backend: > + close_backend(mic); > + } /* forever */ > + > + pthread_exit(NULL); > +} > + > +static void > +reset(struct mic_info *mic) > +{ > +#define RESET_TIMEOUT 120 > + int i = RESET_TIMEOUT; > + setsysfs(mic->name, "state", "reset"); > + while (i) { > + char *state; > + state = readsysfs(mic->name, "state"); > + if (!state) > + goto retry; > + mpsslog("%s: %s %d state %s\n", >...

...: write status=%d on desc=%p\n", + __func__, __LINE__, + status, desc); +#endif + } + } + free(iovec); +_stop_virtblk: + stop_virtblk(mic); +_close_backend: + close_backend(mic); + } /* forever */ + + pthread_exit(NULL); +} + +static void +reset(struct mic_info *mic) +{ +#define RESET_TIMEOUT 120 + int i = RESET_TIMEOUT; + setsysfs(mic->name, "state", "reset"); + while (i) { + char *state; + state = readsysfs(mic->name, "state"); + if (!state) + goto retry; + mpsslog("%s: %s %d state %s\n", + mic->name, __func__, __LINE__, state);...

ChangeLog: ========= v1 => v2: a) License wording cleanup, sysfs ABI documentation, patch 1 refactoring into 3 smaller patches and function renames, as per feedback from Greg Kroah-Hartman. b) Use VRINGH infrastructure for accessing virtio rings from the host in patch 5, as per feedback from Michael S. Tsirkin. v1: Initial post @ https://lkml.org/lkml/2013/7/24/810 Description:

ChangeLog: ========= v1 => v2: a) License wording cleanup, sysfs ABI documentation, patch 1 refactoring into 3 smaller patches and function renames, as per feedback from Greg Kroah-Hartman. b) Use VRINGH infrastructure for accessing virtio rings from the host in patch 5, as per feedback from Michael S. Tsirkin. v1: Initial post @ https://lkml.org/lkml/2013/7/24/810 Description:

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

ChangeLog: ========= v2 => v3: a) Patch 1 data structure cleanups, header file include cleanups, IDA interface reuse and switching to device_create_with_groups(..) as per feedback from Greg Kroah-Hartman. b) Patch 7 signal documentation, sleep workaround removal and sysfs access API cleanups as per feedback from Michael S. Tsirkin. v1 => v2: @ http://lwn.net/Articles/563131/ a)

An Intel MIC X100 device is a PCIe form factor add-in coprocessor card based on the Intel Many Integrated Core (MIC) architecture that runs a Linux OS. It is a PCIe endpoint in a platform and therefore implements the three required standard address spaces i.e. configuration, memory and I/O. The host OS loads a device driver as is typical for PCIe devices. The card itself runs a bootstrap after

An Intel MIC X100 device is a PCIe form factor add-in coprocessor card based on the Intel Many Integrated Core (MIC) architecture that runs a Linux OS. It is a PCIe endpoint in a platform and therefore implements the three required standard address spaces i.e. configuration, memory and I/O. The host OS loads a device driver as is typical for PCIe devices. The card itself runs a bootstrap after