search for: res0node

Displaying 4 results from an estimated 4 matches for "res0node".

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2013 Jan 04
2
[LLVMdev] TableGen patterns with multiple outputs
...TableGen/Main.cpp:117 #15 0x00000001002d0864 in main (argc=11, argv=0x7fff5fbff8f8) at /Users/jholewinski/projects/llvm/src/llvm/utils/TableGen/TableGen.cpp:181 The fault occurs in CodeGenDAGPatterns.cpp: 2781 for (unsigned i = 0; i != NumResults; ++i) 2782 ResultPattern->setType(i, Res0Node->getExtType(i)); Res0Node has only 1 type, but it is expected to have 2. Looking at the X86 back-end code, it looks like there do exist multi-output instructions, but they all use physical (implicit) registers for the second destination, not arbitrary register types. And if I change the seco...
2013 Jan 07
2
[LLVMdev] TableGen patterns with multiple outputs
...0001002d0864 in main (argc=11, argv=0x7fff5fbff8f8) at > /Users/jholewinski/projects/llvm/src/llvm/utils/TableGen/TableGen.cpp:181 > > > The fault occurs in CodeGenDAGPatterns.cpp: > > 2781 for (unsigned i = 0; i != NumResults; ++i) > 2782 ResultPattern->setType(i, Res0Node->getExtType(i)); > > Res0Node has only 1 type, but it is expected to have 2. > > > Looking at the X86 back-end code, it looks like there do exist > multi-output instructions, but they all use physical (implicit) registers > for the second destination, not arbitrary register...
2013 Jan 07
0
[LLVMdev] TableGen patterns with multiple outputs
...000001002d0864 in main (argc=11, argv=0x7fff5fbff8f8) at /Users/jholewinski/projects/llvm/src/llvm/utils/TableGen/TableGen.cpp:181 > > > The fault occurs in CodeGenDAGPatterns.cpp: > > 2781 for (unsigned i = 0; i != NumResults; ++i) > 2782 ResultPattern->setType(i, Res0Node->getExtType(i)); > > Res0Node has only 1 type, but it is expected to have 2. > > > Looking at the X86 back-end code, it looks like there do exist multi-output instructions, but they all use physical (implicit) registers for the second destination, not arbitrary register types....
2013 Jan 07
0
[LLVMdev] TableGen patterns with multiple outputs
...argc=11, argv=0x7fff5fbff8f8) at /Users/jholewinski/projects/llvm/src/llvm/utils/TableGen/TableGen.cpp:181 >> >> >> The fault occurs in CodeGenDAGPatterns.cpp: >> >> 2781 for (unsigned i = 0; i != NumResults; ++i) >> 2782 ResultPattern->setType(i, Res0Node->getExtType(i)); >> >> Res0Node has only 1 type, but it is expected to have 2. >> >> >> Looking at the X86 back-end code, it looks like there do exist multi-output instructions, but they all use physical (implicit) registers for the second destination, not arbitr...