search for: requester_start

...iommu_topo_endpoint +\end{description} + +\paragraph{PCI range}\label{sec:Device Types / IOMMU Device / Device initialization / topology / PCI range} + +\begin{lstlisting} +struct virtio_iommu_topo_pci_range { + struct virtio_iommu_topo_head head; + le32 endpoint_start; + le16 hierarchy; + le16 requester_start; + le16 requester_end; + le16 reserved; +}; +\end{lstlisting} + +The PCI range structure describes the endpoint IDs of a series of PCI +devices. + +\begin{description} + \item[\field{hierarchy}] Identifier of the PCI hierarchy. Sometimes + called PCI segment or domain number. + \item[\field{...

..., dev_cfg, 2, offset + 2); + + switch (cap.head.type) { + case VIRTIO_IOMMU_TOPO_PCI_RANGE: + cap.pci.endpoint_start = viommu_cread(dev, pci_cfg, + dev_cfg, 2, offset + + 4); + cap.pci.hierarchy = viommu_cread(dev, pci_cfg, dev_cfg, + 2, offset + 8); + cap.pci.requester_start = viommu_cread(dev, pci_cfg, + dev_cfg, 2, + offset + 10); + cap.pci.requester_end = viommu_cread(dev, pci_cfg, + dev_cfg, 2, offset + + 12); + dev_info(&dev->dev, + "topology: adding PCI range 0x%x [0x%x:0x%x] -> 0x%x\n",...

...tch (cap.head.type) { > + case VIRTIO_IOMMU_TOPO_PCI_RANGE: > + cap.pci.endpoint_start = viommu_cread(dev, pci_cfg, > + dev_cfg, 2, offset > + + 4); > + cap.pci.hierarchy = viommu_cread(dev, pci_cfg, dev_cfg, > + 2, offset + 8); > + cap.pci.requester_start = viommu_cread(dev, pci_cfg, > + dev_cfg, 2, > + offset + 10); > + cap.pci.requester_end = viommu_cread(dev, pci_cfg, > + dev_cfg, 2, offset + > + 12); > + dev_info(&dev->dev, > + "topology: adding PCI range 0x...

I'm seeking feedback on multi-platform support for virtio-iommu. At the moment only devicetree (DT) is supported and we don't have a pleasant solution for other platforms. Once we figure out the topology description, x86 support is trivial. Since the IOMMU manages memory accesses from other devices, the guest kernel needs to initialize the IOMMU before endpoints start issuing DMA.

I'm seeking feedback on multi-platform support for virtio-iommu. At the moment only devicetree (DT) is supported and we don't have a pleasant solution for other platforms. Once we figure out the topology description, x86 support is trivial. Since the IOMMU manages memory accesses from other devices, the guest kernel needs to initialize the IOMMU before endpoints start issuing DMA.

...es endpoint probe until the virtio-iommu device is ready. Each element in the array describes either a PCI range or a single MMIO endpoint, and their associated endpoint IDs: struct virtio_iommu_topo_pci_range { __le16 type; /* 1: PCI range */ __le16 hierarchy; /* PCI domain number */ __le16 requester_start; /* First BDF */ __le16 requester_end; /* Last BDF */ __le32 endpoint_start; /* First endpoint ID */ }; struct virtio_iommu_topo_endpoint { __le16 type; /* 2: Endpoint */ __le16 reserved; /* 0 */ __le32 endpoint; /* Endpoint ID */ __le64 address; /* First MMIO address */ }; You can...

...probe_size; > + struct virtio_iommu_topo_config topo_config; > +}; > + > +#define VIRTIO_IOMMU_TOPO_PCI_RANGE 0x1 > +#define VIRTIO_IOMMU_TOPO_ENDPOINT 0x2 > + > +struct virtio_iommu_topo_pci_range { > + __le16 type; > + __le16 hierarchy; > + __le16 requester_start; > + __le16 requester_end; > + __le32 endpoint_start; > +}; > + > +struct virtio_iommu_topo_endpoint { > + __le16 type; > + __le16 reserved; > + __le32 endpoint; > + __le64 address; > }; > > /* Request types */ As any UAPI change, thi...

...g, > + u32 *epid) > +{ > + u32 endpoint_start; > + u16 start, end, domain; > + u16 devid = pci_dev_id(pdev); > + u16 type = le16_to_cpu(cfg->type); > + > + if (type != VIRTIO_IOMMU_TOPO_PCI_RANGE) > + return false; > + > + start = le16_to_cpu(cfg->pci.requester_start); > + end = le16_to_cpu(cfg->pci.requester_end); > + domain = le16_to_cpu(cfg->pci.hierarchy); > + endpoint_start = le32_to_cpu(cfg->pci.endpoint_start); > + > + if (pci_domain_nr(pdev->bus) == domain && > + devid >= start && devid <= end) {...

...g, > + u32 *epid) > +{ > + u32 endpoint_start; > + u16 start, end, domain; > + u16 devid = pci_dev_id(pdev); > + u16 type = le16_to_cpu(cfg->type); > + > + if (type != VIRTIO_IOMMU_TOPO_PCI_RANGE) > + return false; > + > + start = le16_to_cpu(cfg->pci.requester_start); > + end = le16_to_cpu(cfg->pci.requester_end); > + domain = le16_to_cpu(cfg->pci.hierarchy); > + endpoint_start = le32_to_cpu(cfg->pci.endpoint_start); > + > + if (pci_domain_nr(pdev->bus) == domain && > + devid >= start && devid <= end) {...

...g, > + u32 *epid) > +{ > + u32 endpoint_start; > + u16 start, end, domain; > + u16 devid = pci_dev_id(pdev); > + u16 type = le16_to_cpu(cfg->type); > + > + if (type != VIRTIO_IOMMU_TOPO_PCI_RANGE) > + return false; > + > + start = le16_to_cpu(cfg->pci.requester_start); > + end = le16_to_cpu(cfg->pci.requester_end); > + domain = le16_to_cpu(cfg->pci.hierarchy); > + endpoint_start = le32_to_cpu(cfg->pci.endpoint_start); > + > + if (pci_domain_nr(pdev->bus) == domain && > + devid >= start && devid <= end) {...

...g, > + u32 *epid) > +{ > + u32 endpoint_start; > + u16 start, end, domain; > + u16 devid = pci_dev_id(pdev); > + u16 type = le16_to_cpu(cfg->type); > + > + if (type != VIRTIO_IOMMU_TOPO_PCI_RANGE) > + return false; > + > + start = le16_to_cpu(cfg->pci.requester_start); > + end = le16_to_cpu(cfg->pci.requester_end); > + domain = le16_to_cpu(cfg->pci.hierarchy); > + endpoint_start = le32_to_cpu(cfg->pci.endpoint_start); > + > + if (pci_domain_nr(pdev->bus) == domain && > + devid >= start && devid <= end) {...