search for: relexit

...4 %5 = add nsw i32 %4, 1 store i32 %5, i32* %i, align 4 br label %bb1 ==> %0 = load i32* %i, align 4 %HV14_ = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0 %1 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0 %HVCmp7 = icmp ne i32* %1, %HV14_ br i1 %HVCmp7, label %relExit, label %bb.split So that HV14_ is a new instruction and I am inserting a comparison to jump to a newly created basic block. Somehow the code generation for arm removes the duplicated instruction and cmp instruction in arm assembly looks as follows. cmp r0, r0 This defeats the purpose of doing th...

...l %bb8 To protect the operand of the store I duplicate the input chain of operands and insert a comparison to check whether the operand of the stores are correct. As a result of this modification the code looks as follows. Here instructions with HV in there name are extra inserted instructions and relExit BB contains a printf message which is executed if the comparison fails. This is the final code which is supposed to execute on a simulator or real hardware. bb7: %46 = load i32* %j, align 4 %47 = add nsw i32 %46, 1 %HV7_ = add nsw i32 %46, 1 %HVCmp13 = icmp ne i32 %47, %HV7_ br i1 %HVCmp...

...1 02:31, D S Khudia <daya.khudia at gmail.com> wrote: >   %0 = load i32* %i, align 4 >   %HV14_ = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0 >   %1 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0 >   %HVCmp7 = icmp ne i32* %1, %HV14_ >   br i1 %HVCmp7, label %relExit, label %bb.split > > So that HV14_ is a new instruction and I am inserting a comparison to jump > to a newly created basic block. Somehow the code generation for arm removes > the duplicated instruction and cmp instruction in arm assembly looks as > follows. > cmp r0, r0 Hi Daya,...

...s. IR BB: bb: ; preds = %bb1.split %0 = load i32* %i, align 4 %HV10_ = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0 %1 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0 %HVCmp15 = icmp ne i32* %1, %HV10_ br i1 %HVCmp15, label %relExit, label %bb.split x86 asm: .LBB0_1: # %bb # in Loop: Header=BB0_5 Depth=1 leal 972(%esp), %eax movl 568(%esp), %ecx imull $4, %ecx, %edx addl %eax, %edx imull $4, %ecx, %ecx addl %eax, %ecx cmpl %edx, %ecx...

On 7 July 2011 00:02, D S Khudia <daya.khudia at gmail.com> wrote: > I am trying to add a intrinsic call between the similar two instructions > which either I'll remove or convert to nop in codegen. If the two instructions are only similar in your real example, than you need to make them similar in your test, not identical. Different offsets, different array... If them two are

Hi Renato, I am trying to add a intrinsic call between the similar two instructions which either I'll remove or convert to nop in codegen. Does that kind of seem appropriate for the purpose here? Thanks Daya On Wed, Jul 6, 2011 at 11:55 AM, Renato Golin <renato.golin at arm.com> wrote: > On 6 July 2011 15:57, D S Khudia <daya.khudia at gmail.com> wrote: > > Since I am

On 6 July 2011 14:55, D S Khudia <daya.khudia at gmail.com> wrote: > The following is an example code generation for arm and x86 for a same IR > BB. In the x86 code I can see that the same computation is done twice and > result is stored in two different registers and then these two different > registers are used for comparision. Yes, but you shouldn't rely on it, since the

...2* %32, align 4 %34 = load i32* %i, align 4 %HV4_3 = sub nsw i32 %34, %33 %35 = sub nsw i32 %34, %33 %HV4_2 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %HV4_3 %36 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %35 %LDCmp6 = icmp ne i32* %36, %HV4_2 br i1 %LDCmp6, label %relExit, label %bb6.split.split In the above example even the operands are not same and I guess compiler cannot be that smart at -O0. I sense something is wrong with the code generation for ARM. What other way do you suggest for duplicating since you mentioned I shouldn't rely on duplication the way...