Displaying 2 results from an estimated 2 matches for "relaxablesection".
2017 Jul 11
8
[LLD] Linker Relaxation
Here's an example using the gcc toolchain for embedded 32 bit RISC-V (my
HiFive1 board):
#include <stdio.h>
int foo(int i){
if (i < 100){
printf("%d\n", i);
}
return i;
}
int main(){
foo(10);
return 0;
}
After compiling to a .o with -O2 -march=RV32IC we get (just looking at foo)
00000000 <foo>:
0: 1141 addi sp,sp,-16
2017 Jul 11
4
[LLD] Linker Relaxation
By the way, since this is an optional code relaxation, we can think about
it later. The first thing I would do is to add RISC-V support to lld
without code shrinking relaxations, which I believe is doable by at most a
few hundreds lines of code.
On Wed, Jul 12, 2017 at 3:21 AM, Rui Ueyama <ruiu at google.com> wrote:
> On Tue, Jul 11, 2017 at 9:14 PM, Bruce Hoult via llvm-dev <
>