search for: relas

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2019 Jan 18
0
[klibc:master] mips: use -Ttext-segment when linking shared library
Commit-ID: 048bfb0df170d4a43142adcee8a2dffdfc2c1e9f Gitweb: http://git.kernel.org/?p=libs/klibc/klibc.git;a=commit;h=048bfb0df170d4a43142adcee8a2dffdfc2c1e9f Author: James Cowgill <james.cowgill at mips.com> AuthorDate: Fri, 2 Mar 2018 08:33:01 -0800 Committer: Ben Hutchings <ben at decadent.org.uk> CommitDate: Wed, 2 Jan 2019 03:08:04 +0000 [klibc] mips: use -Ttext-segment
2019 Jan 21
0
[PATCH] ia64: Fix shared build
We need to build with -mno-pic to disable all uses of GP, as well as use a custom linker script to avoid collisions between klibc.so's and the executable's segments. Signed-off-by: James Clarke <jrtc27 at jrtc27.com> --- usr/klibc/arch/ia64/MCONFIG | 3 + usr/klibc/arch/ia64/crt0.S | 4 - usr/klibc/arch/ia64/klibc.ld | 267 ++++++++++++++++++++++++++++++++++++++++++
2019 Jan 21
0
[klibc:master] ia64: Fix shared build
Commit-ID: 8418552770110e9864ab24d60d8481fac58d3a65 Gitweb: http://git.kernel.org/?p=libs/klibc/klibc.git;a=commit;h=8418552770110e9864ab24d60d8481fac58d3a65 Author: James Clarke <jrtc27 at jrtc27.com> AuthorDate: Mon, 21 Jan 2019 21:26:57 +0000 Committer: Ben Hutchings <ben at decadent.org.uk> CommitDate: Mon, 21 Jan 2019 22:51:27 +0000 [klibc] ia64: Fix shared build We
2013 Nov 04
3
[LLVMdev] [ARM] Mixing rel/rela relocations
On 11/04/2013 11:15 AM, Eric Christopher wrote: > > > > On Mon, Nov 4, 2013 at 11:05 AM, Shankar Easwaran > <shankare at codeaurora.org <mailto:shankare at codeaurora.org>> wrote: > > Hi, > > I was looking at the ARM ABI > docs(http://infocenter.arm.__com/help/topic/com.arm.doc.__ihi0044e/IHI0044E_aaelf.pdf >
2017 Dec 05
2
[LLD] Slow callstacks in gdb
Martin Richtarsky <s at martinien.de> writes: > Rafael Avila de Espindola wrote: >>> I will retry with clang trunk, when it reproduces I will build some >>> other >>> large project (that has DSOs) using our compile/link options (they are >>> not >>> that special, I think). >> >> If you can try lld trunk too that would be awesome.
2013 Nov 04
0
[LLVMdev] [ARM] Mixing rel/rela relocations
On 11/4/2013 1:40 PM, Jack Carter wrote: > On 11/04/2013 11:15 AM, Eric Christopher wrote: >> >> >> >> On Mon, Nov 4, 2013 at 11:05 AM, Shankar Easwaran >> <shankare at codeaurora.org <mailto:shankare at codeaurora.org>> wrote: >> >> Hi, >> >> I was looking at the ARM ABI >>
2013 Nov 04
4
[LLVMdev] [ARM] Mixing rel/rela relocations
Hi, I was looking at the ARM ABI docs(http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf) and they mention. "A binary file may use REL or RELA relocations or a mixture of the two (but multiple relocations for the same address must use only one type)." Does LLVM emit rel/rela relocations with ARM ? Any tests ? Thanks Shankar Easwaran -- Qualcomm
2018 Mar 02
5
[PATCH 0/5] Various MIPS fixes
Hi, I noticed that klibc started crashing on 64-bit MIPS and in my quest to fix the bug I got a bit carried away and fixed a few other things as well. Here are various miscellaneous MIPS patches, although the first patch is the important one. Thanks, James *** BLURB HERE *** James Cowgill (5): mips64: compile with -mno-abicalls mips: use -Ttext-segment when linking shared library
2014 Mar 11
4
[PATCH] add mips64 support
From: Dejan Latinovic <Dejan.Latinovic at imgtec.com> --- usr/include/arch/mips64/klibc/archconfig.h | 3 + usr/include/arch/mips64/klibc/archsetjmp.h | 39 ++++++ usr/include/arch/mips64/machine/asm.h | 76 ++++++++++ usr/include/fcntl.h | 2 +- usr/include/sys/md.h | 1 + usr/include/sys/resource.h | 4 +-
2006 Jun 26
2
[klibc 28/43] mips support for klibc
The parts of klibc specific to the mips architecture. Signed-off-by: H. Peter Anvin <hpa at zytor.com> --- commit 8dc79563c06020d8844b9e9b821741828039b59e tree b957c8fb1fddf486f5c26b1880726051d4f6aaad parent bc9b363b31d301ab94c115cccc2e079c0d318498 author H. Peter Anvin <hpa at zytor.com> Sun, 25 Jun 2006 16:58:31 -0700 committer H. Peter Anvin <hpa at zytor.com> Sun, 25 Jun
2013 Nov 04
0
[LLVMdev] [ARM] Mixing rel/rela relocations
On Mon, Nov 4, 2013 at 11:05 AM, Shankar Easwaran <shankare at codeaurora.org>wrote: > Hi, > > I was looking at the ARM ABI docs(http://infocenter.arm. > com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf) and they mention. > > "A binary file may use REL or RELA relocations or a mixture of the two > (but multiple relocations for the same > address must use
2014 Jan 19
2
[LLVMdev] [lld] Relocation sections format: .rela / .rel
Hi, Now lld writes relocations to the ".rela" sections only. Mips requires to use the "rel" format. So we need to be able to select format and names of relocation section, names of symbols like __rela_iplt_* / __rel_iplt_*, dynamic table tag DT_RELA / DT_REL. My current idea: - Add two virtual functions DefaultLayout::createDynamicRelocationTable() and
2012 Aug 03
1
[LLVMdev] llvm-objdump does not give information about all relocations
Hi, We are trying to use LLVM API to programmatically obtain a list of relocations in an ELF file. The way we are doing this is exactly as llvm-objdump does it: we are iterating through sections and in each section we are iterating over relocations (see PrintRelocations() function at https://llvm.org/svn/llvm-project/llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp). However, it does not give us
2013 Nov 04
0
[LLVMdev] [ARM] Mixing rel/rela relocations
Hi Shankar, > Does LLVM emit rel/rela relocations with ARM ? I believe we emit .rel for (32-bit) ARM. Hard-coded in ARMELFObjectWriter.cpp (“HasRelocationAddend”). It seems to be what most toolchains have settled on. AArch64 is .rela always in LLVM, in case it matters. > Any tests ? Well there are tests of what we do, but obviously not of the full scope of functionality permitted by the
2018 May 23
0
[PATCH v3 23/27] x86/modules: Adapt module loading for PIE support
Adapt module loading to support PIE relocations. Generate dynamic GOT if a symbol requires it but no entry exist in the kernel GOT. Position Independent Executable (PIE) support will allow to extended the KASLR randomization range below the -2G memory limit. Signed-off-by: Thomas Garnier <thgarnie at google.com> --- arch/x86/Makefile | 4 + arch/x86/include/asm/module.h
2017 Dec 05
2
[LLD] Slow callstacks in gdb
Martin Richtarsky <s at martinien.de> writes: > Output looks as follows [1] Seems sh_offset is missing? That is what readelf prints as Off > [17] .rela.text RELA 0000000000000000 071423 001728 18 > 1 4 8 The offset of rela text should have been aligned, but it is not. Can you report a bug on icc? As a work around using the gnu assembler if possible
2014 Jan 19
0
[LLVMdev] [lld] Relocation sections format: .rela / .rel
I think the linking context should decide whether to use rel (or) rela. This is also needed if --emit-relocations option is chosen (or) -r option is used. Thoughts ? Sent from my iPhone > On Jan 19, 2014, at 15:01, Simon Atanasyan <simon at atanasyan.com> wrote: > > Hi, > > Now lld writes relocations to the ".rela" sections only. Mips requires > to use the
2013 Aug 22
0
Paquete rela
Hola, Justo, el paquete rela es específico para análisis de items. Para análisis factorial un paquete recomendable es psych http://cran.r-project.org/web/packages/psych/index.html En concreto fa. En el pdf tienes todos los detalles para esta función, así como alternativas -análisis factorial es un mundo. En la task view Psychometrics tienes un porrón de librerías relacionadas. Saludos! Pedro El
2013 Jun 10
1
Using Lattice, LatticeExtra - Hide right and top axes in multipanel plots
Dear Rxperts, How do I hide the top and right axes in multiple panel plots? A couple of examples are provided below.. Would highly appreciate appreciate your assistance.. #Example 1 library(latticeExtra) xyplot((1:200)/20 ~ (1:200)/20, type = c("p", "g"), scales = list(x = list(log = 2,alternating=0), y = list(log = 10,alternating=0)), xscale.components =
2015 May 06
2
[LLVMdev] [lld] Wrong references for C++ COMDAT groups
Hi, Checking the llvm test-suite SingleSource/Regression/C++/EH/class_hierarchy testcase on aarch64 I noted something strange: Dump of assembler code for function _Z4funcj: 0x0000000000400650 <+0>: stp x22, x21, [sp,#-48]! 0x0000000000400654 <+4>: stp x20, x19, [sp,#16] 0x0000000000400658 <+8>: stp x29, x30, [sp,#32] 0x000000000040065c