search for: rejectedmemnod

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2014 Dec 19
2
[LLVMdev] ScheduleDAGInstrs.cpp
...chedGraph(), as I am still not happy about things there. I have found at least two examples which do not work out: 1) SU(2) Store "Value A" SU(1) Store "Value A" SU(0) Load "Value A" If MIsNeedChainEdge() returns false for SU(0) and SU(1), SU(0) is inserted into RejectedMemNodes and removed from its MemUses SU list, as this list is cleared. Therefore SU(2) must be handled with adjustChainDeps(), because it needs an edge from SU(0). For some reason adjustChainDeps() was only called for may-aliasing stores. I think this is wrong, as a store will clear the MemUses SU list a...
2015 Jan 30
2
[LLVMdev] [PATCH] Bugfix for missed dependency from store to load in buildSchedGraph().
...; I have found at least two examples which do not work out: > > 1) > > SU(2) Store "Value A" > > SU(1) Store "Value A" > > SU(0) Load "Value A" > > If MIsNeedChainEdge() returns false for SU(0) and SU(1), SU(0) is > inserted into RejectedMemNodes and removed from its MemUses SU list, > as this list is cleared. Therefore SU(2) must be handled with > adjustChainDeps(), because it needs an edge from SU(0). > For some reason adjustChainDeps() was only called for may-aliasing > stores. I think this is wrong, as a store will clea...
2015 Feb 10
2
[LLVMdev] [PATCH] Bugfix for missed dependency from store to load in buildSchedGraph().
...out: > > > > 1) > > > > SU(2) Store "Value A" > > > > SU(1) Store "Value A" > > > > SU(0) Load "Value A" > > > > If MIsNeedChainEdge() returns false for SU(0) and SU(1), SU(0) is > > inserted into RejectedMemNodes and removed from its MemUses SU list, > > as this list is cleared. Therefore SU(2) must be handled with > > adjustChainDeps(), because it needs an edge from SU(0). > > For some reason adjustChainDeps() was only called for may-aliasing > > stores. I think this is wrong,...
2014 Dec 16
3
[LLVMdev] ScheduleDAGInstrs.cpp
Hi, Thank you for the reply. >It looks to me like we can choose any subset of edges here and be correct. We're basically trying to prune/pinch the DAG edges here. They can easily blow up with AA sched. I would guess that isCtrl() edges are good ones to bypass because they could be a low-latecy edges, whereas true data dependencies from a load are expected to be >higher latency, so they