search for: reiter

Displaying 20 results from an estimated 532 matches for "reiter".

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2015 Feb 08
3
Nvidia Mod Update
...t to do such stupid stuff again? > > Assuming you mean that you just updated the kmod-nvidia package, then > follow the instructions at the top of this page. > > http://elrepo.org/tiki/kmod-nvidia > > It happened to me, too. Easy fix. :-) > > Steve > Yes, just to reiterate: yum erase kmod-nvidia yum install kmod-nvidia-340xx reboot You will then be on the correct driver branch and will get the appropriate driver updates going forwards, no changes to yum necessary.
2006 May 23
3
Manipulating code?
...I would like to obtain cut points iteratively for each variable by re-applying a dichotomised variable in the model and then recalculate it. I planned to have fixed names for the dichotomised variables so I could use the same syntax for every recalculation of the whole model. I furthermore want to reiterate the process until no cut point changes any more. My problem is in accomplishing this syntactically. How can I pass a variable name to a function without getting lost in "as.symbol" and "eval" and "parse" mayhem? I am feeling I am thinking too much in macro expansio...
2013 Jan 04
4
Iterative loop using "repeat"
...irst two matrices: function(x) { for(i in 1:10) repeat { b<-robustm(S_X) b2<-robustm(b) if(abs(b2[i,i]-b[i,i])<=0.001) break } print(b2)} in particular S_X is my matrix number1 (already defined, dim 10*10), b2 is my matrix n.2, if the difference isn't less than my value, I would like reiterate the process using b2 instead S_X and so on... (actually serves to me that if the difference is not less than 0.001 the process starts again taking the last array that has identified as output (in this case b2) and the remarket in the process creating b3, b4, etc. up to find the minimum differen...
2009 Dec 04
1
cycling k times a realization of a random walk.....problems..
...re is automatizing the process for 100 times. my random walk generating function is: rwalk <- function(n,p, x0=0) ? ? ? ???{ ? ? ? ? ? x <- rbinom(n,1,p) ? ? ? ? ? x[which(x==0)] <- -1 ? ? ? ? ? y<-c(x0,x) ? ? ? ? ? y <- cumsum(y) ? ? ? ? ???} THIS IS THE CODE THAT I'D LIKE TO REITERATE a<- rwalk(n,p,x0=0) #whish to generate 100 of those #and for each calculate the following o<-which(a==0) N<-length(o) # number of times the walk returns to 0 Nn<-(o[-1]-N) # number of steps to get to 0 V<-mean(Nn)? # mean time of return to 0 par(mfrow=c(1,1)) plot(0:n, a, type...
2008 Oct 15
2
imap segfaults in dovecot 1.2 on logout
...out)... cheers sascha -- Sascha Wilde OpenPGP key: 4BB86568 http://www.intevation.de/~wilde/ http://www.intevation.de/ Intevation GmbH, Neuer Graben 17, 49074 Osnabr?ck; AG Osnabr?ck, HR B 18998 Gesch?ftsf?hrer: Frank Koormann, Bernhard Reiter, Dr. Jan-Oliver Wagner -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 188 bytes Desc: not available URL: <http://dovecot.org/pipermail/dovecot/attachments/20081015/e4391df0/attachment-0002.bin>
1998 Nov 14
2
no updates seen on PC after unix changed (v2.0 alpha)
...the PC side again it shows me the old file, not what has been changed on the unix side. I have looked through all the documentation and can't see anything parameter that might be causing this problem. If anyone know what I can do to fix it please let me know. Thanks in advance, David. David Reiter dreiter@logicon.com Logicon Information Technology Group 404 Camino Del Rio South #500 San Diego, California 92108-3503 619-610-8800 x 5260
2009 Oct 05
5
[LLVMdev] Functions: sret and readnone
Hi all, I'm currently building a DSL for a computer graphics project that is not unlike NVIDIA's Cg. I have an intrinsic with the following signature float4 sample(texture tex, float2 coords); that is translated to this LLVM IR code: declare void @"sample"(%float4* noalias nocapture sret, %texture, $float2) nounwind readnone The type float4 is basically an array of four
2005 May 20
2
Non-algorithmic RIDs
...ith this problem. Is there a non-disruptive way for me to convert their RIDs to be algorithmic based on their UIDs, without destroying their roaming profiles etc? If not I think we will just have to deal with not being able to use ACLs on member servers, but I thought I would query first. To reiterate, we are using a LDAP backend. Misty
2017 Mar 14
10
Please dogfood LLD
...x86-64 (and probably for AArch64 and MIPS). I believe you've heard a few good news about the linker -- it just works <http://lld.llvm.org/#features> and is very fast <http://lld.llvm.org/#performance>, clean, compact and supported by the active community. I don't think I need to reiterate why having a good linker is important for us as the LLVM community. There's one thing you can help us without writing even a line of code. Please use it! Using LLD to link LLVM/clang/etc is easy. You need to check out the LLD repository just like you probably already did for clang, build i...
2011 Nov 29
0
[LLVMdev] [llvm-commits] Vectors of Pointers and Vector-GEP
"Rotem, Nadav" <nadav.rotem at intel.com> writes: > David, > > Thanks for the support! I sent a detailed email with the overall > plan. But just to reiterate, the GEP would look like this: > > %PV = getelementptr <4 x i32*> %base, <4 x i32> <i32 1, i32 2, i32 3, i32 4> > > Where the index of the GEP is a vector of indices. I am not against > having multiple indices. I just want to start with a basic set of > featu...
2011 Nov 29
3
[LLVMdev] [llvm-commits] Vectors of Pointers and Vector-GEP
David, Thanks for the support! I sent a detailed email with the overall plan. But just to reiterate, the GEP would look like this: %PV = getelementptr <4 x i32*> %base, <4 x i32> <i32 1, i32 2, i32 3, i32 4> Where the index of the GEP is a vector of indices. I am not against having multiple indices. I just want to start with a basic set of features. Thanks, Nadav --...
2020 Apr 17
2
[RFC] DWARF Version 6 Proposal For Heterogeneous Debugging
...fted a proposal of backwards compatible extensions to DWARF for heterogeneous debugging which is rendered at https://llvm.org/docs/AMDGPUDwarfProposalForHeterogeneousDebugging.html. The proposal includes a thorough introduction with justification, so I won't belabor that here, but I do want to reiterate that the extensions are designed to be vendor and architecture neutral, and completely backwards compatible with DWARF 5. I am beginning to work on a reference implementation of the proposal in LLVM, with some very preliminary support appearing in some patches starting at https://reviews.llvm.o...
2015 Mar 04
4
IP drop list
...>> mass port-scans and so on and this data are available *everywhere* >> >> so if some IP hits there it takes 60 seconds and any service >> supportings DNS blacklists can block them *even before* the bot hits >> the real mailserver at all >> > I would like to reiterate Reindl Harald's point above, since subsequent > discussion has gotten away from it. If Dovecot had DNS RBL support > similar to Postfix, I think quite a few people would use it, and thereby > defeat the scanners far more effectively than any other method. It is > good that other...
2009 Jan 18
2
Extracting random rows from a dataset
...idation, I think that is). How do I do that? Of course all the characters of each row must remain together. Also, I am not very familiar with the R-Base language (it is the first time I use it) so if You could also explain to me what every function and argument means, it would be great help to then reiterate the procedure. Thank You very much, Sebastiano -- View this message in context: http://www.nabble.com/Extracting-random-rows-from-a-dataset-tp21530539p21530539.html Sent from the R help mailing list archive at Nabble.com.
2015 Mar 02
6
IP drop list
Am 02.03.2015 um 18:56 schrieb Robert Schetterer: > perhaps and i mean really "perhaps" go this way > > https://sys4.de/de/blog/2014/03/27/fighting-smtp-auth-brute-force-attacks/ > > https://sys4.de/de/blog/2012/12/28/botnets-mit-rsyslog-und-iptables-recent-modul-abwehren/ > > 45K+ IPs will work in a recent table > i have them too but for smtp only like > >
2011 Nov 29
4
[LLVMdev] [llvm-commits] Vectors of Pointers and Vector-GEP
----- Original Message ----- > "Rotem, Nadav" <nadav.rotem at intel.com> writes: > > > David, > > > > Thanks for the support! I sent a detailed email with the overall > > plan. But just to reiterate, the GEP would look like this: > > > > %PV = getelementptr <4 x i32*> %base, <4 x i32> <i32 1, i32 2, i32 > > 3, i32 4> > > > > Where the index of the GEP is a vector of indices. I am not against > > having multiple indices. I just want to...
2017 Mar 17
4
RFC: (in-principle) native unquoting for standard evaluation
(please be gentle, it's my first time) I am interested in discussions (possibly reiterating past threads -- searching didn't turn up much) on the possibility of supporting standard evaluation unquoting at the language level. This has been brought up in a recent similar thread here [1] and on Twitter [2] where I proposed the following desired (in-principle) syntax f <- fun...
2006 Mar 15
2
Asterisk integration with office PBX
Forgive me if this question has been asked/answered in another post. And let me reiterate what other users have frequently said - Asterisk is great, and I really appreciate all the work you folks have put into it. How have some of you gone about integrating Asterisk with a legacy office PBX, such that the end-user can use a regular office (digital handset) and dialing is fairly sea...
2020 May 12
2
[PATCH 1/3] drm/radeon: remove AGP support
...s do > it based on facts. > I didn't mean to imply that AGP GART support was already removed. But for the vast majority of users the end result is the same. If you knew enough re-enable AGP GART, you probably wouldn't have been as confused about what this patch set does either. To reiterate, this patch set does not remove support for AGP cards, it only removes the support for AGP GART. The cards will still be functional using the device GART. There may be performance tradeoffs there in some cases. Alex
2011 Jun 15
0
[LLVMdev] Haswell New Instructions
...LY to allow a vector of pointers. I absolutely agree with this view. >> What one most frequently wants to do in those architectures is to specify a >> 64bit scalar base pointer with a vector of 32bit offsets. > > Or 64-bit offsets. We should not restrict offsets to 32 bits. To reiterate, a base address + vector of indices gets my vote. If the base happens to be zero and the indices happen to be pre-scaled pointer values, so be it. :) The raises the question of whether indices get scaled by the vector element type size. This would compilcate the semantics of load, I think, b...