search for: regsister

I don’t quite follow why you are doing something like this. What is the advantage of this instead of just attaching the AddrRegs regsister class as the register class for your instruction? So that you would have an ADD instruction like %AddrRegOut = ADD %AddrRegIn1, %AddrRegIn2 What kind of problematic regalloc are you trying to avoid with introducing a new backend data type? Marcello > On 25 May 2016, at 19:07, Lawrence, Peter...

...ass for every type in MachineValueTypes.h On Wed, May 25, 2016 at 8:12 PM, Marcello Maggioni via llvm-dev < llvm-dev at lists.llvm.org> wrote: > I don’t quite follow why you are doing something like this. > > What is the advantage of this instead of just attaching the AddrRegs > regsister class as the register class for your instruction? > So that you would have an ADD instruction like > %AddrRegOut = ADD %AddrRegIn1, %AddrRegIn2 > > What kind of problematic regalloc are you trying to avoid with introducing > a new backend data type? > > Marcello > > On 25...

Quentin, My real problem is that my target has separate address and data registers. The way I’d like to try getting better reg-alloc than I am now is to bring out the difference as Early as possible, so I have added p16, p32, p64 to the enum in “MachineValueType.h” And I have called addRegisterClass(MVT::p32, &XyzAddrRegsRegClass); And I have an override for virtual

...n MachineValueTypes.h On Wed, May 25, 2016 at 8:12 PM, Marcello Maggioni via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote: I don’t quite follow why you are doing something like this. What is the advantage of this instead of just attaching the AddrRegs regsister class as the register class for your instruction? So that you would have an ADD instruction like %AddrRegOut = ADD %AddrRegIn1, %AddrRegIn2 What kind of problematic regalloc are you trying to avoid with introducing a new backend data type? Marcello On 25 May 2016, at 19:07, Lawrence, Peter via ll...

...s.h > > > > On Wed, May 25, 2016 at 8:12 PM, Marcello Maggioni via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > I don’t quite follow why you are doing something like this. > > > > What is the advantage of this instead of just attaching the AddrRegs > regsister class as the register class for your instruction? > > So that you would have an ADD instruction like > > %AddrRegOut = ADD %AddrRegIn1, %AddrRegIn2 > > > > What kind of problematic regalloc are you trying to avoid with introducing > a new backend data type? > > >...

Index: linux-2.6.16-rc5/Documentation/vmi_spec.txt =================================================================== --- linux-2.6.16-rc5.orig/Documentation/vmi_spec.txt 2006-03-09 23:33:29.000000000 -0800 +++ linux-2.6.16-rc5/Documentation/vmi_spec.txt 2006-03-10 12:55:29.000000000 -0800 @@ -0,0 +1,2197 @@ + + Paravirtualization API Version 2.0 + + Zachary Amsden, Daniel Arai, Daniel Hecht,

Index: linux-2.6.16-rc5/Documentation/vmi_spec.txt =================================================================== --- linux-2.6.16-rc5.orig/Documentation/vmi_spec.txt 2006-03-09 23:33:29.000000000 -0800 +++ linux-2.6.16-rc5/Documentation/vmi_spec.txt 2006-03-10 12:55:29.000000000 -0800 @@ -0,0 +1,2197 @@ + + Paravirtualization API Version 2.0 + + Zachary Amsden, Daniel Arai, Daniel Hecht,