search for: regs1

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2004 Jul 07
1
Histograms, density, and relative frequencies
...I will admit that some of the underlying mathematics of the density discussion are beyond my current understanding, but I am looking into it. I have a data set (600,000 obs) used to parameterize a probabilistic causal model where each obs is a population response for one of 2 classes (either regs1 and regs2). I have been attempting to create 1 marginal probability plot with 2 lines (one for each class). Using my rather rough code, I created a plot that seems to adhere to the commonly used (although from what I can understand wrong) relative frequency histogram approach. My rough code l...
2014 Aug 05
2
[LLVMdev] Concerning not relevant argument count in TableGen Patterns.
...ld use two register type operands: "/mov R1, R2/" For this purpose I assume that the instruction definition in the TargetInstrInfo.td file should be like: at first I am defining the class form my instruction: *class Mymov<bits&lt;6> op, string instr_asm>: FI<op, (outs Regs1:$rs), (ins Regs2:$rt), !strconcat(instr_asm, &quot;\t$rt, $rs&quot;), [], NoItinerary> { let imm16 = 0; }* where *Regs1* and *Regs2* are corresponding *RegisterClasses*. Then I need to define the instruction: *def MOVInstr : Mymov<0x2, "mov">;* *def : Ta...
2014 Jan 28
2
[LLVMdev] Load Instruction that changes value of two registers
...fine if I could tell LLVM that reg2 is invalid after a load Operation, but I don#t know how to do that... I tried the following in TableGen to let LLVM know that Resg2 isn't valid anymore after a load but it didn't produce the desired result: let Defs = [Regs2] in { def LD: Inst<(outs Regs1:$dst), (ins MEM:$addr), "load $addr, $dst;", [(set Regs1:$dst, (load addr:$addr))]>; } Thanks in advance, Markus -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140129/2653ceba/attachment.htm...