search for: registerschedul

Hi all, Just a notice for out-of-tree maintainer, I removed RegisterScheduler::setDefault in r243388. It was used to override the default command line option that selects the DAG scheduler to use. Instead of hacking into the command line plumbing, a target that wants more control over the selection of the scheduler than it already has with setSchedulingPreference has a S...

I'm a taking a compiler course and I'm supposed to implement a scheduler for the LLVM compiler and comapre its persformance to the existing one used by LLVM-gcc. I need some help understanding what is really happening in LLVM-gcc. In CodeGen/SelectionDAG/ I can see four different Schedulers, which one is used by LLVM? Can you give a hint on where/how to add a new scheduler and test

...diff --git a/lib/Frontend/CodeGenAction.cpp b/lib/Frontend/CodeGenAction.cpp index 86005f2..cd2d2f0 100644 --- a/lib/Frontend/CodeGenAction.cpp +++ b/lib/Frontend/CodeGenAction.cpp @@ -322,7 +322,7 @@ bool BackendConsumer::AddEmitPasses() { // Set register scheduler & allocation policy. RegisterScheduler::setDefault(createDefaultScheduler); - RegisterRegAlloc::setDefault(Fast ? createLocalRegisterAllocator : + RegisterRegAlloc::setDefault(Fast ? createFastRegisterAllocator : createLinearScanRegisterAllocator); // Create the code generator passes. I have tes...

...lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp,v retrieving revision 1.332 diff -u -r1.332 SelectionDAGISel.cpp --- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 16 Dec 2006 21:14:48 -0000 1.332 +++ lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 19 Dec 2006 19:06:06 -0000 @@ -81,6 +81,16 @@ static RegisterScheduler defaultListDAGScheduler("default", " Best scheduler for the target", createDefaultScheduler); + + static cl::opt<bool> + SchedulerMemoryDisambiguation( + "sched-memory-disambiguation", cl::Hidden, + cl::desc("Tu...

...to force codegen to run according to the callgraph. Currently, this is achieved by adding a dummy CGSCC pass as the container pass of codegen passes. In NPM, this could be implemented by pre-sorting IR functions by callgraph order in the machine pass manager. - MachinePassRegistry/RegisterRegAlloc/RegisterScheduler. These are for dynamic registering machine passes and also used for in-tree machine passes. Personlly I don't think this is needed and similar opinions were expressed before (https://reviews.llvm.org/D54203#1291969). We should probably just register them as normal passes. - Timing machine pas...

...jects/compiler/llvm-gcc/gcc/llvm-backend.cpp:172: error: invalid use of undefined type `struct llvm::TargetMachine' /projects/compiler/llvm-gcc/gcc/llvm-internal.h:58: error: forward declaration of `struct llvm::TargetMachine' /projects/compiler/llvm-gcc/gcc/llvm-backend.cpp:176: error: `RegisterScheduler' has not been declared /projects/compiler/llvm-gcc/gcc/llvm-backend.cpp:176: error: `createDefaultScheduler' was not declared in this scope /projects/compiler/llvm-gcc/gcc/llvm-backend.cpp:178: error: `RegisterScheduler' has not been declared /projects/compiler/llvm-gcc/gcc/llvm-bac...