search for: registerscavenger

There's an assert at line 192, lib/CodeGen/RegisterScavenging.cpp that appears to get tripped on targets that don't have subregisters defined: bool SubUsed = false; for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) if (isUsed(SubReg)) { SubUsed = true; break; }

No, I wasn't having a management lobotomy moment. If the target's registers have no subregisters, SubUsed is false and the assert gets tripped. Ok, back to the original question: What was the original intent in this code (lines 186-193 in lib/CodeGen/RegisterScavenging.cpp)? -scooter On Thu, Feb 25, 2010 at 7:00 PM, Scott Michel <scooter.phd at gmail.com> wrote: > Ugh.

Ugh. Management lobotomy kicked in. Need to RTFC better. On Thu, Feb 25, 2010 at 6:18 PM, Scott Michel <scooter.phd at gmail.com> wrote: > There's an assert at line 192, lib/CodeGen/RegisterScavenging.cpp that > appears to get tripped on targets that don't have subregisters defined: > > bool SubUsed = false; > for (const unsigned *SubRegs =

Scott Michel skrev: > No, I wasn't having a management lobotomy moment. If the target's registers have > no subregisters, SubUsed is false and the assert gets tripped. > > Ok, back to the original question: What was the original intent in this code > (lines 186-193 in lib/CodeGen/RegisterScavenging.cpp)? You beat me to it :). A simple bypass (patch attached) does at

There is also the LivePhysReg facility that I would recomment if you just want to query for a free register and do not need the full feature set of the RegisterScavenger. - Matthias > On Jan 19, 2017, at 5:50 AM, Nemanja Ivanovic via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > I believe what you're after is the register scavenger. > It's in: include/llvm/CodeGen/RegisterScavenging.h > Implementation: lib/CodeGen/RegisterScavengi...

...> Regards, > Hu Hong > > On 20 January 2017 at 03:55, Matthias Braun <mbraun at apple.com> wrote: > >> There is also the LivePhysReg facility that I would recomment if you just >> want to query for a free register and do not need the full feature set of >> the RegisterScavenger. >> >> - Matthias >> >> On Jan 19, 2017, at 5:50 AM, Nemanja Ivanovic via llvm-dev < >> llvm-dev at lists.llvm.org> wrote: >> >> I believe what you're after is the register scavenger. >> It's in: include/llvm/CodeGen/RegisterScavenging.h...

Hi All, Given a machine instruction, is it possible to tell which register(s) is still not in use? For example, given one instruction A, if the one follows it (say B) defines register rax, then I can tell rax should spare at instruction A. The purpose is to use the spare register to replace registers used by A, for instrumentation purpose. Regards, Hu Hong -------------- next part

On Feb 28, 2010, at 11:49 PM, <Kalle.Raiskila at nokia.com> <Kalle.Raiskila at nokia.com> wrote: > Jakob Stoklund Olesen skrev: >> On Feb 26, 2010, at 10:09 AM, Scott Michel wrote: >>> This patch now causes new problems in the CellSPU >>> backend (more stqd's and lqd's), so I have to investigate those >>> before committing the patch. >

Kalle: Your patch is similar to what I'd coded (and am testing, which means a couple of hours before I consider committing). Other than cosmetic changes and changing 'NULL' to '0' (it's an integer list, after all). This patch now causes new problems in the CellSPU backend (more stqd's and lqd's), so I have to investigate those before committing the patch.

...e probably found a bug. Can you reproduce it with one of the normal back ends? > 2. Is it unreliable to get a physical register's liverange by Kill, Dead messages from MachineBasicBlock?? You also need to use the live-in list for each MBB, but otherwise it should be reliable. Look at how RegisterScavenger is doing it. /jakob -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type: application/pkcs7-signature Size: 1929 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100114/b0907dbf/attachment.bin>

Hi, I have ported LLC to a risc cpu. It can pass benchmark that I have at current. But I want do some optimization after register alloction by adjusting register using. I scan MachineBasicBlock to analyze operand's IsKill, IsDead , IsDef attribute to get a physical register's liverange. But I get a strange case at MBB.jpg. R4 is marked <kill> at MBB0. If I scan R4's

Hello llvm'ers, We are using the llvm compiler tools (llvm-link, llc, etc) to generate code for ARM for the Android NDK. We're on a pretty tight deadline and have a host of issues that we could use some help overcoming. We're interested in bringing on a contractor experienced in llvm to help us. Broadly, llc is giving various assertion failures while generating the native code

Is it possible to get a virtual register and then use that to create a real register? I've seen it done in unittests/CodeGen/MachineInstrTest.cpp like this: unsigned VirtualDef1 = -42; VD1VU->addOperand(*MF, MachineOperand::CreateReg(VirtualDef1, /*isDef*/ true)); But when I do that in my code I get an assertion so I wasn't sure if it's legal or not. Thanks.

I ran into another issue with register scavenger. In my case, I don't need a place on the stack for an emergency spill slot. I have these free mips32 registers, that are not in general very useful for other things, for the emergency spill slot. I can move to and from mips16 (subset of mips32) registers and mips32 registers. I also have a situation where I need two free registers so then

On Nov 28, 2010, at 8:29 PM, Isaac Asay wrote: > > I am continuing to look over the code in the ARMLoadStoreOptimizer.cpp file, but I was wondering if you had a specific suggestion or a documentation resource that I could use to perform this instruction rearrangement in an LLVM idiomatic way. Using my algorithm, I already know where I can move MachineInstrs without effecting program

Hi! I started writing a LLVM backend for a custom architecture. I have some register and instruction .td files and some other files/classes like a MCStreamer for assembler output. At the moment I can compile some empty programs so far. I implemented the method ::eliminateFrameIndex() similar to the Sparc and ARM backend. The method looks like this: // frame pointer is in reg of class

Hi, I would like to know what register scavenging is, but reading RegisterScavenging.h [1] and googling don't help too much. Could someone explain it a little bit (what it is and when we need it), or point me to some nice link, I will be very appreciated. :-) [1] http://llvm.org/docs/doxygen/html/RegisterScavenging_8h_source.html Regards, chenwj -- Wei-Ren Chen (陳韋任) Homepage:

Hi, I'm new to LLVM. I'd like to know if there is a method I can call whenever I need any available CPU register. Thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20181222/e916b214/attachment.html>

...truction? I looked at LiveIntervals and LiveVariables, but > they seem to be for cases when the pass knows the register and wants to > find the points where it is live. My code knows the point and wants to > find the registers that are live. I've been doing something similar using the RegisterScavenger class. However, I'm no LLVM expert (yet), so that may not be the best way. > Another part of the problem is to spill the registers to the stack. Do > you think this is possible with the existing register spilling code? I would also be interested to know if anyone has adapted the existi...

You mean when I "explicity" use it by calling methods of register scavenger? Right now I'm just allocating virtual registers that will be resolved by the use of register scavenger and I'm also providing an override of the virtual method saveScavengerRegister. In Mips16, I have an extra mips 32 register (not usually very useful since it can only be used in a move instruction)