Displaying 2 results from an estimated 2 matches for "registermaskpair".
2016 Jan 22
2
Allowing virtual registers after register allocation
...neRegisterInfo::setVirtRegsAfterRegalloc() and MachineRegisterInfo::getVirtRegsAfterRegalloc(). Because I would assume that we will find more examples like the following (from MachineBasicBlock):
>
> void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask = ~0u) {
> LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask));
> }
>
> this needs to be changed to support VRegs. But if we do that change, I'd like to change it to something like this:
>
> void addLiveIn(unsigned Reg, LaneBitmask LaneMask = ~0u) {
> assert(TargetRegisterInfo::isPhysReg(Reg) || getParent()-&...
2016 Jan 22
2
Allowing virtual registers after register allocation
Here are 2 patches, which are independent of each other.
The first splits PrologEpilogInserter into 2 parts :
http://reviews.llvm.org/D16481
After looking at the code I thought it made more sense for the major split
to include whether callee-saved register spills are supported. So for
non-virtual targets, virtual registers are not supported and scavenging is
optionally supported, and vice versa