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2013 Feb 02
1
[LLVMdev] Trouble with instructions for lowering load/store.
Hello. I write backend for Z80 cpu and I have some trouble with lowering load/store nodes to different machine opcodes. Some target instructions work with specified registers (not all registers in RegisterClass). Often it's one or two registers. I don't understand how use ComplexPattern in this case. But if I don't use ComplexPattern I'll have other problems - not all instruction can select in InstructionSelection pass. My work place here: https://github.com/earl1k/llvm-z80 Example...