search for: register_size

...for each platform have different combinations of operations. The portable SIMD here is to make an uniform system of SIMD operations at all power-of-2 field widths. For example, for simd_add on SSE2, I want to have all the following operations supported, simd<2^x>::add(a, b) for 2<=2^x<=register_size(register_size equals 128 in SSE2). However, SSE2 only supports simd_add on field widths of 8, 16, 32, or 64. Hence, simulation for simd_add on field widths of 2, 4 and 128 is needed. *At mean time, I want the simulation to be as good as possible*. *An iteration Approach* My current approach of get...

...ave different combinations of > operations. The portable SIMD here is to make an uniform system of SIMD > operations at all power-of-2 field widths. > For example, for simd_add on SSE2, I want to have all the following operations > supported, simd<2^x>::add(a, b) for 2<=2^x<=register_size(register_size equals > 128 in SSE2). However, SSE2 only supports simd_add on field widths of 8, 16, 32, > or 64. Hence, simulation for simd_add on field widths of 2, 4 and 128 is needed. > *At mean time, I want the simulation to be as good as possible*. LLVM already does this: if you use...

...s of > > operations. The portable SIMD here is to make an uniform system of SIMD > > operations at all power-of-2 field widths. > > For example, for simd_add on SSE2, I want to have all the following > operations > > supported, simd<2^x>::add(a, b) for 2<=2^x<=register_size(register_size > equals > > 128 in SSE2). However, SSE2 only supports simd_add on field widths of 8, > 16, 32, > > or 64. Hence, simulation for simd_add on field widths of 2, 4 and 128 is > needed. > > *At mean time, I want the simulation to be as good as possible*. > &...

# uname -a Linux ns2 2.6.18-4-sparc64 #1 Mon Mar 26 11:16:07 UTC 2007 sparc64 GNU/Linux # dovecot -n # 1.0.1: /usr/local/etc/dovecot.conf Segmentation fault uhu? ciao Luca