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...logical that noone will ever query > the liveness of those registers (unless there is a bug somewhere in the Indeed the coalesced registers may logically not be queried since they do not appear in any operand list of the machine code, but the VarInfo::DefInst in VirtRegInfo of the _representive register_ is _not_ correct (I could trace the code at the time of writing this mail). In the other words, the patch not only have to remove the VarInfo record in VirtRegInfo, but also have to update the record for _representive register_. -- Tzu-Chien Chiu, 3D Graphics Hardware Architect <URL:http://ww...

On Wed, 2005-09-07 at 18:24 +0800, Tzu-Chien Chiu wrote: > I though LiveVariables may be invalidated by LiveIntervals, but it's > declared not: > > void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const > { > AU.addPreserved<LiveVariables>(); > AU.addRequired<LiveVariables>(); > ... > > LiveInterval may coalesce virtual registers and

I though LiveVariables may be invalidated by LiveIntervals, but it's declared not: void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const { AU.addPreserved<LiveVariables>(); AU.addRequired<LiveVariables>(); ... LiveInterval may coalesce virtual registers and remove identity moves instructions: bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {

...22 = 3.1416 Generating the two instruction could be easily done by custom inserter at end of Instruction Selection. It is understood that the MachineRegisterInfo has all the information about the sub-registers overlapping. But the problem is have to map (before registers allocation) _one Virtual Register_ of RegClassAB into the _two overlapping physical sub-registers_ ! Has someone an idea to properly lowering and allocating registers to BUILD_VECTOR, considering my SIMD registers definition and my instructions set? Thanks in advance, comments are welcome. Dominique Torette. [http://www....

On 3 November 2013 05:44, Sean Silva <chisophugis at gmail.com> wrote: > LLVM doesn't provide a runtime or "VM". You basically do these things the > same way that you do them in C. Yes, this unfortunately requires knowing > your target platform's system libraries and how to link to them and such; > LLVM doesn't paper over this. OK. So to be specific, I am